Lumped transmission line avalanche pulser
Abstract
A lumped linear avalanche transistor pulse generator utilizes stacked transistors in parallel within a stage and couples a plurality of said stages, in series with increasing zener diode limited voltages per stage and decreasing balanced capacitance load per stage to yield a high voltage, high and constant current, very short pulse. 8 figs.
- Inventors:
- Issue Date:
- Research Org.:
- University of California
- OSTI Identifier:
- 87742
- Patent Number(s):
- 5,434,456
- Application Number:
- PAN: 8-015,105
- Assignee:
- Univ. of California, Oakland, CA (United States)
- DOE Contract Number:
- W-7405-ENG-48
- Resource Type:
- Patent
- Resource Relation:
- Other Information: PBD: 18 Jul 1995
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 24 POWER TRANSMISSION AND DISTRIBUTION; POWER SYSTEMS; HIGH-VOLTAGE PULSE GENERATORS; OPERATION; DESIGN; OPTIMIZATION
Citation Formats
Booth, R. Lumped transmission line avalanche pulser. United States: N. p., 1995.
Web.
Booth, R. Lumped transmission line avalanche pulser. United States.
Booth, R. Tue .
"Lumped transmission line avalanche pulser". United States.
@article{osti_87742,
title = {Lumped transmission line avalanche pulser},
author = {Booth, R},
abstractNote = {A lumped linear avalanche transistor pulse generator utilizes stacked transistors in parallel within a stage and couples a plurality of said stages, in series with increasing zener diode limited voltages per stage and decreasing balanced capacitance load per stage to yield a high voltage, high and constant current, very short pulse. 8 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1995},
month = {7}
}
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