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Title: Schottky barrier MOSFET systems and fabrication thereof

Abstract

(MOS) device systems-utilizing Schottky barrier source and drain to channel region junctions are disclosed. Experimentally derived results which demonstrate operation of fabricated N-channel and P-channel Schottky barrier (MOSFET) devices, and of fabricated single devices with operational characteristics similar to (CMOS) and to a non-latching (SRC) are reported. Use of essentially non-rectifying Schottky barriers in (MOS) structures involving highly doped and the like and intrinsic semiconductor to allow non-rectifying interconnection of, and electrical accessing of device regions is also disclosed. Insulator effected low leakage current device geometries and fabrication procedures therefore are taught. Selective electrical interconnection of drain to drain, source to drain, or source to source, of N-channel and/or P-channel Schottky barrier (MOSFET) devices formed on P-type, N-type and Intrinsic semiconductor allows realization of Schottky Barrier (CMOS), (MOSFET) with (MOSFET) load, balanced differential (MOSFET) device systems and inverting and non-inverting single devices with operating characteristics similar to (CMOS), which devices can be utilized in modulation, as well as in voltage controled switching and effecting a direction of rectification.

Inventors:
 [1]
  1. 10328 Pinehurst Ave., Omaha, NE 68124
Issue Date:
Research Org.:
James D Welch
OSTI Identifier:
871132
Patent Number(s):
5663584
Assignee:
Welch, James D. (10328 Pinehurst Ave., Omaha, NE 68124)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC Y10S - TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
DOE Contract Number:  
FG47-93R701314
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
schottky; barrier; mosfet; systems; fabrication; device; systems-utilizing; source; drain; channel; region; junctions; disclosed; experimentally; derived; results; demonstrate; operation; fabricated; n-channel; p-channel; devices; single; operational; characteristics; similar; cmos; non-latching; src; reported; essentially; non-rectifying; barriers; structures; involving; highly; doped; intrinsic; semiconductor; allow; interconnection; electrical; accessing; regions; insulator; effected; leakage; current; geometries; procedures; taught; selective; formed; p-type; n-type; allows; realization; load; balanced; differential; inverting; non-inverting; operating; utilized; modulation; voltage; controled; switching; effecting; direction; rectification; barrier mosfet; electrical interconnection; single device; characteristics similar; operating characteristics; schottky barrier; highly doped; single devices; leakage current; rate operation; voltage control; devices formed; fabrication procedures; intrinsic semiconductor; schottky barriers; semiconductor allows; channel region; fabrication procedure; experimentally derived; operating characteristic; electrical interconnect; derived results; /257/

Citation Formats

Welch, James D. Schottky barrier MOSFET systems and fabrication thereof. United States: N. p., 1997. Web.
Welch, James D. Schottky barrier MOSFET systems and fabrication thereof. United States.
Welch, James D. Wed . "Schottky barrier MOSFET systems and fabrication thereof". United States. https://www.osti.gov/servlets/purl/871132.
@article{osti_871132,
title = {Schottky barrier MOSFET systems and fabrication thereof},
author = {Welch, James D},
abstractNote = {(MOS) device systems-utilizing Schottky barrier source and drain to channel region junctions are disclosed. Experimentally derived results which demonstrate operation of fabricated N-channel and P-channel Schottky barrier (MOSFET) devices, and of fabricated single devices with operational characteristics similar to (CMOS) and to a non-latching (SRC) are reported. Use of essentially non-rectifying Schottky barriers in (MOS) structures involving highly doped and the like and intrinsic semiconductor to allow non-rectifying interconnection of, and electrical accessing of device regions is also disclosed. Insulator effected low leakage current device geometries and fabrication procedures therefore are taught. Selective electrical interconnection of drain to drain, source to drain, or source to source, of N-channel and/or P-channel Schottky barrier (MOSFET) devices formed on P-type, N-type and Intrinsic semiconductor allows realization of Schottky Barrier (CMOS), (MOSFET) with (MOSFET) load, balanced differential (MOSFET) device systems and inverting and non-inverting single devices with operating characteristics similar to (CMOS), which devices can be utilized in modulation, as well as in voltage controled switching and effecting a direction of rectification.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1997},
month = {1}
}

Works referenced in this record:

Etched Schottky-barrier m.o.s.f.e.t.s using a single mask
journal, January 1971


Formation kinetics of CrSi2 films on Si substrates with and without interposed Pd2Si layer
journal, December 1976


Metallurgical and electrical properties of chromium silicon interfaces
journal, January 1980


Compound formation between amorphous silicon and chromium
journal, December 1980


SB-IGFET: An insulated-gate field-effect transistor using Schottky barrier contacts for source and drain
journal, January 1968