Method for fabricating transistors using crystalline silicon devices on glass
Abstract
A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.
- Inventors:
-
- Menlo Park, CA
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- OSTI Identifier:
- 871128
- Patent Number(s):
- 5663078
- Assignee:
- Regents of University of California (Oakland, CA)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC Y10S - TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- DOE Contract Number:
- W-7405-ENG-48
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- method; fabricating; transistors; crystalline; silicon; devices; glass; single-crystal; overcomes; potential; damage; caused; device; voltage; bonding; employs; metal; layer; incorporated; transistor; accomplished; wafer; substrate; performed; current; pass; fabricated; removal; deposited; form; electrical; contact; add; functionality; single; gate-all-around; formed; silicon device; metal layer; electrical contact; silicon substrate; glass substrate; silicon wafer; crystalline silicon; silicon devices; crystal silicon; single-crystal silicon; method overcomes; fabricating transistors; voltage bonding; form electrical; potential damage; current pass; /438/
Citation Formats
McCarthy, Anthony M. Method for fabricating transistors using crystalline silicon devices on glass. United States: N. p., 1997.
Web.
McCarthy, Anthony M. Method for fabricating transistors using crystalline silicon devices on glass. United States.
McCarthy, Anthony M. Wed .
"Method for fabricating transistors using crystalline silicon devices on glass". United States. https://www.osti.gov/servlets/purl/871128.
@article{osti_871128,
title = {Method for fabricating transistors using crystalline silicon devices on glass},
author = {McCarthy, Anthony M},
abstractNote = {A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Wed Jan 01 00:00:00 EST 1997},
month = {Wed Jan 01 00:00:00 EST 1997}
}
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