Repairable chip bonding/interconnect process

Bernhardt, Anthony F; Contolini, Robert J; Malba, Vincent; Riddle, Robert A

Title: Repairable chip bonding/interconnect process

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Abstract

A repairable, chip-to-board interconnect process which addresses cost and testability issues in the multi-chip modules. This process can be carried out using a chip-on-sacrificial-substrate technique, involving laser processing. This process avoids the curing/solvent evolution problems encountered in prior approaches, as well is resolving prior plating problems and the requirements for fillets. For repairable high speed chip-to-board connection, transmission lines can be formed on the sides of the chip from chip bond pads, ending in a gull wing at the bottom of the chip for subsequent solder.

Inventors:

Bernhardt, Anthony F ^[1]; Contolini, Robert J ^[2]; Malba, Vincent ^[2]; Riddle, Robert A ^[3]

Berkeley, CA
Livermore, CA
Tracy, CA

Issue Date:: 1997-01-01

Research Org.:: Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

OSTI Identifier:: 871076

Patent Number(s):: 5653019

Assignee:: Regents of University of California (Oakland, CA)

Patent Classifications (CPCs):: H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC Y10T - TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

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H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
H01L2924/0105 - Tin [Sn]
H01L2924/01033 - Arsenic [As]
H01L2221/68359 - used as a support during manufacture of interconnect decals or build up layers
H01L21/6835 - {using temporarily an auxiliary support}
H01L2224/291 - with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
H01L2924/01029 - Copper [Cu]
H01L2224/29111 - Tin [Sn] as principal constituent
H01L24/83 - {using a layer connector}
H01L2924/01024 - Chromium [Cr]
H01L2924/014 - Solder alloys
H01L2224/2919 - with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy

Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC Y10T - TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
Y10T29/49144 - by metal fusion

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
H01L2224/24226 - the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
H01L2924/12042 - LASER
H01L2924/01011 - Sodium [Na]
H01L24/82 - {by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
H01L2924/01082 - Lead [Pb]
H01L2224/82001 - involving a temporary auxiliary member not forming part of the bonding apparatus
H01L2924/01078 - Platinum [Pt]
H01L2924/01006 - Carbon [C]
H01L2924/01023 - Vanadium [V]
H01L2221/6835 - used as a support during build up manufacturing of active devices
H01L2924/00 - Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L2924/00014 - the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
H01L2924/07802 - not being an ohmic electrical conductor
H01L2924/19042 - being an inductor
H01L2224/83192 - wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
H01L2924/14 - Integrated circuits
H01L2924/0665 - Epoxy resin
H01L2224/24051 - Conformal with the semiconductor or solid-state device
H01L2224/8385 - using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
H01L2924/01049 - Indium [In]
H01L24/19 - {Manufacturing methods of high density interconnect preforms}
H01L2924/01079 - Gold [Au]
H01L24/29 - {of an individual layer connector}
H01L2924/01073 - Tantalum [Ta]
H01L2924/01018 - Argon [Ar]
H01L2924/0132 - Binary Alloys
H01L2924/01074 - Tungsten [W]
H01L24/24 - {of an individual high density interconnect connector}

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DOE Contract Number:: W-7405-ENG-48

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: repairable; chip; bonding; interconnect; process; chip-to-board; addresses; cost; testability; issues; multi-chip; modules; carried; chip-on-sacrificial-substrate; technique; involving; laser; processing; avoids; curing; solvent; evolution; encountered; prior; approaches; resolving; plating; requirements; fillets; speed; connection; transmission; lines; formed; bond; pads; gull; bottom; subsequent; solder; multi-chip modules; transmission lines; transmission line; bond pads; laser processing; multi-chip module; chip bond; interconnect process; /29/257/438/

Citation Formats


                    Bernhardt, Anthony F, Contolini, Robert J, Malba, Vincent, and Riddle, Robert A. Repairable chip bonding/interconnect process.  United States: N. p., 1997. 
        Web.

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                    Bernhardt, Anthony F, Contolini, Robert J, Malba, Vincent, & Riddle, Robert A. Repairable chip bonding/interconnect process.  United States.

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                    Bernhardt, Anthony F, Contolini, Robert J, Malba, Vincent, and Riddle, Robert A. Wed .  
        "Repairable chip bonding/interconnect process".  United States.  https://www.osti.gov/servlets/purl/871076.

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@article{osti_871076,

  title        = {Repairable chip bonding/interconnect process},

  author       = {Bernhardt, Anthony F and Contolini, Robert J and Malba, Vincent and Riddle, Robert A},

  abstractNote = {A repairable, chip-to-board interconnect process which addresses cost and testability issues in the multi-chip modules. This process can be carried out using a chip-on-sacrificial-substrate technique, involving laser processing. This process avoids the curing/solvent evolution problems encountered in prior approaches, as well is resolving prior plating problems and the requirements for fillets. For repairable high speed chip-to-board connection, transmission lines can be formed on the sides of the chip from chip bond pads, ending in a gull wing at the bottom of the chip for subsequent solder.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {1997},

  month        = {1}

}

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