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Title: Sequence information signal processor for local and global string comparisons

Abstract

A sequence information signal processing integrated circuit chip designed to perform high speed calculation of a dynamic programming algorithm based upon the algorithm defined by Waterman and Smith. The signal processing chip of the present invention is designed to be a building block of a linear systolic array, the performance of which can be increased by connecting additional sequence information signal processing chips to the array. The chip provides a high speed, low cost linear array processor that can locate highly similar global sequences or segments thereof such as contiguous subsequences from two different DNA or protein sequences. The chip is implemented in a preferred embodiment using CMOS VLSI technology to provide the equivalent of about 400,000 transistors or 100,000 gates. Each chip provides 16 processing elements, and is designed to provide 16 bit, two's compliment operation for maximum score precision of between -32,768 and +32,767. It is designed to provide a comparison between sequences as long as 4,194,304 elements without external software and between sequences of unlimited numbers of elements with the aid of external software. Each sequence can be assigned different deletion and insertion weight functions. Each processor is provided with a similarity measure device which is independentlymore » variable. Thus, each processor can contribute to maximum value score calculation using a different similarity measure.« less

Inventors:
 [1];  [2];  [3];  [4]
  1. Alta Loma, CA
  2. San Dimas, CA
  3. Culver City, CA
  4. Pasadena, CA
Issue Date:
Research Org.:
California Institute of Technology (Pasadena, CA)
OSTI Identifier:
870964
Patent Number(s):
5632041
Assignee:
California Institute of Technology (Pasadena, CA)
DOE Contract Number:  
FG03-88ER60683
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
sequence; information; signal; processor; local; global; string; comparisons; processing; integrated; circuit; chip; designed; perform; speed; calculation; dynamic; programming; algorithm; based; defined; waterman; smith; building; block; linear; systolic; array; performance; increased; connecting; additional; chips; provides; cost; locate; highly; similar; sequences; segments; contiguous; subsequences; dna; protein; implemented; preferred; embodiment; cmos; vlsi; technology; provide; equivalent; 400; 000; transistors; 100; gates; 16; elements; bit; compliment; operation; maximum; score; precision; -32; 768; 32; 767; comparison; 194; 304; external; software; unlimited; assigned; deletion; insertion; weight; functions; provided; similarity; measure; device; independently; variable; contribute; value; information signal; linear array; signal processor; signal processing; preferred embodiment; integrated circuit; circuit chip; chip design; sequence information; maximum value; signal process; dynamic programming; independently variable; highly similar; algorithm based; /712/

Citation Formats

Peterson, John C, Chow, Edward T, Waterman, Michael S, and Hunkapillar, Timothy J. Sequence information signal processor for local and global string comparisons. United States: N. p., 1997. Web.
Peterson, John C, Chow, Edward T, Waterman, Michael S, & Hunkapillar, Timothy J. Sequence information signal processor for local and global string comparisons. United States.
Peterson, John C, Chow, Edward T, Waterman, Michael S, and Hunkapillar, Timothy J. Wed . "Sequence information signal processor for local and global string comparisons". United States. https://www.osti.gov/servlets/purl/870964.
@article{osti_870964,
title = {Sequence information signal processor for local and global string comparisons},
author = {Peterson, John C and Chow, Edward T and Waterman, Michael S and Hunkapillar, Timothy J},
abstractNote = {A sequence information signal processing integrated circuit chip designed to perform high speed calculation of a dynamic programming algorithm based upon the algorithm defined by Waterman and Smith. The signal processing chip of the present invention is designed to be a building block of a linear systolic array, the performance of which can be increased by connecting additional sequence information signal processing chips to the array. The chip provides a high speed, low cost linear array processor that can locate highly similar global sequences or segments thereof such as contiguous subsequences from two different DNA or protein sequences. The chip is implemented in a preferred embodiment using CMOS VLSI technology to provide the equivalent of about 400,000 transistors or 100,000 gates. Each chip provides 16 processing elements, and is designed to provide 16 bit, two's compliment operation for maximum score precision of between -32,768 and +32,767. It is designed to provide a comparison between sequences as long as 4,194,304 elements without external software and between sequences of unlimited numbers of elements with the aid of external software. Each sequence can be assigned different deletion and insertion weight functions. Each processor is provided with a similarity measure device which is independently variable. Thus, each processor can contribute to maximum value score calculation using a different similarity measure.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1997},
month = {1}
}

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