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Title: Complementary junction heterostructure field-effect transistor

Abstract

A complimentary pair of compound semiconductor junction heterostructure field-effect transistors and a method for their manufacture are disclosed. The p-channel junction heterostructure field-effect transistor uses a strained layer to split the degeneracy of the valence band for a greatly improved hole mobility and speed. The n-channel device is formed by a compatible process after removing the strained layer. In this manner, both types of transistors may be independently optimized. Ion implantation is used to form the transistor active and isolation regions for both types of complimentary devices. The invention has uses for the development of low power, high-speed digital integrated circuits.

Inventors:
 [1];  [1];  [1];  [1]
  1. Albuquerque, NM
Issue Date:
Research Org.:
Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
OSTI Identifier:
870224
Patent Number(s):
5479033
Assignee:
Sandia Corporation (Albuquerque, NM)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
complementary; junction; heterostructure; field-effect; transistor; complimentary; pair; compound; semiconductor; transistors; method; manufacture; disclosed; p-channel; strained; layer; split; degeneracy; valence; band; greatly; improved; mobility; speed; n-channel; device; formed; compatible; process; removing; manner; types; independently; optimized; implantation; form; active; isolation; regions; devices; power; high-speed; digital; integrated; circuits; field-effect transistor; integrated circuits; integrated circuit; compound semiconductor; strained layer; effect transistor; semiconductor junction; valence band; field-effect transistors; greatly improved; complimentary pair; junction heterostructure; effect transistors; speed digital; heterostructure field-effect; channel device; /257/

Citation Formats

Baca, Albert G, Drummond, Timothy J, Robertson, Perry J, and Zipperian, Thomas E. Complementary junction heterostructure field-effect transistor. United States: N. p., 1995. Web.
Baca, Albert G, Drummond, Timothy J, Robertson, Perry J, & Zipperian, Thomas E. Complementary junction heterostructure field-effect transistor. United States.
Baca, Albert G, Drummond, Timothy J, Robertson, Perry J, and Zipperian, Thomas E. Sun . "Complementary junction heterostructure field-effect transistor". United States. https://www.osti.gov/servlets/purl/870224.
@article{osti_870224,
title = {Complementary junction heterostructure field-effect transistor},
author = {Baca, Albert G and Drummond, Timothy J and Robertson, Perry J and Zipperian, Thomas E},
abstractNote = {A complimentary pair of compound semiconductor junction heterostructure field-effect transistors and a method for their manufacture are disclosed. The p-channel junction heterostructure field-effect transistor uses a strained layer to split the degeneracy of the valence band for a greatly improved hole mobility and speed. The n-channel device is formed by a compatible process after removing the strained layer. In this manner, both types of transistors may be independently optimized. Ion implantation is used to form the transistor active and isolation regions for both types of complimentary devices. The invention has uses for the development of low power, high-speed digital integrated circuits.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1995},
month = {1}
}

Works referenced in this record:

High performance complementary logic based on GaAs/InGaAs/AlGaAs HIGFETs
conference, January 1989


Quantum-well p-channel AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors with very high transconductance
journal, July 1988


The potential of complementary heterostructure FET IC's
journal, December 1987


Complementary heterostructure insulated gate FET circuits for high-speed, low power VLSI
conference, January 1986


Realization of n-channel and p-channel high-mobility (Al,GA)As/GaAs heterostructure insulating gate FET's on a planar wafer surface
journal, December 1985


Complementary heterostructure insulated gate field effect transistors (HIGFETs)
conference, January 1985


Double-implanted GaAs complementary JFET's
journal, January 1984


Quantum-well p-channel AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors
journal, November 1989


Anisotype-gate self-aligned p-channel heterostructure field-effect transistors
journal, January 1993


Complementary GaAs junction-gated heterostructure field effect transistor technology
conference, January 1994