Lambda network having 2.sup.m-1 nodes in each of m stages with each node coupled to four other nodes for bidirectional routing of data packets between nodes

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Title: Lambda network having 2.sup.m-1 nodes in each of m stages with each node coupled to four other nodes for bidirectional routing of data packets between nodes

Abstract

The Lambda network is a single stage, packet-switched interprocessor communication network for a distributed memory, parallel processor computer. Its design arises from the desired network characteristics of minimizing mean and maximum packet transfer time, local routing, expandability, deadlock avoidance, and fault tolerance. The network is based on fixed degree nodes and has mean and maximum packet transfer distances where n is the number of processors. The routing method is detailed, as are methods for expandability, deadlock avoidance, and fault tolerance.

Inventors:

Napolitano, Jr., Leonard M. ^[1]

(825 El Quanito Dr., Danville, CA 94526)

Issue Date:: Sun Jan 01 00:00:00 EST 1995

Research Org.:: AT&T

OSTI Identifier:: 870187

Patent Number(s):: 5471623

Assignee:: Napolitano, Jr., Leonard M. (825 El Quanito Dr., Danville, CA 94526)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04L - TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F15/17393 - {having multistage networks, e.g. broadcasting scattering, gathering, hot spot contention, combining/decombining}

H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04L - TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L49/15 - {Interconnection of switching modules}
H04L49/25 - {Routing or path finding through a switch fabric}
H04L49/3018 - {Input queuing}
H04L49/557 - {Error correction, e.g. fault recovery or fault tolerance}

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DOE Contract Number:: AC04-76DP00789

Resource Type:: Patent

Country of Publication:: United States

Language:: English

Subject:: lambda; network; m-1; nodes; stages; node; coupled; bidirectional; routing; data; packets; single; stage; packet-switched; interprocessor; communication; distributed; memory; parallel; processor; computer; design; arises; desired; characteristics; minimizing; mean; maximum; packet; transfer; time; local; expandability; deadlock; avoidance; fault; tolerance; based; fixed; degree; distances; processors; method; detailed; methods; single stage; communication network; parallel processor; parallel process; processor computer; lambda network; /709/370/

Citation Formats


                    Napolitano, Jr., Leonard M. Lambda network having 2.sup.m-1 nodes in each of m stages with each node coupled to four other nodes for bidirectional routing of data packets between nodes.  United States: N. p., 1995. 
        Web.

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                    Napolitano, Jr., Leonard M. Lambda network having 2.sup.m-1 nodes in each of m stages with each node coupled to four other nodes for bidirectional routing of data packets between nodes.  United States.

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                    Napolitano, Jr., Leonard M. Sun .  
        "Lambda network having 2.sup.m-1 nodes in each of m stages with each node coupled to four other nodes for bidirectional routing of data packets between nodes".  United States.  https://www.osti.gov/servlets/purl/870187.

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@article{osti_870187,

  title        = {Lambda network having 2.sup.m-1 nodes in each of m stages with each node coupled to four other nodes for bidirectional routing of data packets between nodes},

  author       = {Napolitano, Jr., Leonard M.},

  abstractNote = {The Lambda network is a single stage, packet-switched interprocessor communication network for a distributed memory, parallel processor computer. Its design arises from the desired network characteristics of minimizing mean and maximum packet transfer time, local routing, expandability, deadlock avoidance, and fault tolerance. The network is based on fixed degree nodes and has mean and maximum packet transfer distances where n is the number of processors. The routing method is detailed, as are methods for expandability, deadlock avoidance, and fault tolerance.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {Sun Jan 01 00:00:00 EST 1995},

  month        = {Sun Jan 01 00:00:00 EST 1995}

}

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Works referenced in this record:

Prevention of Deadlocks in Packet-Switched Data Transport Systems
journal, April 1981

Gunther, K.
IEEE Transactions on Communications, Vol. 29, Issue 4
https://doi.org/10.1109/TCOM.1981.1095021

A Loop-Structured Switching Network
journal, May 1984

Wong, F. S.; Ito, M. R.
IEEE Transactions on Computers, Vol. C-33, Issue 5, p. 450-455
https://doi.org/10.1109/TC.1984.1676462

A fault tolerant massively parallel processing architecture
journal, August 1987

Balasubramanian, Vijay; Banerjee, Prithviraj
Journal of Parallel and Distributed Computing, Vol. 4, Issue 4
https://doi.org/10.1016/0743-7315(87)90025-6

An Algorithm for Detecting and Resolving Store-and-Forward Deadlocks in Packet-Switched Networks
journal, August 1987

Chan, Cheung-Wing; Yum, Tak-Shing
IEEE Transactions on Communications, Vol. 35, Issue 8, p. 801-807
https://doi.org/10.1109/TCOM.1987.1096856

The cube-connected cycles: a versatile network for parallel computation
journal, May 1981

Preparata, Franco P.; Vuillemin, Jean
Communications of the ACM, Vol. 24, Issue 5
https://doi.org/10.1145/358645.358660

Prevention of Store-and-Forward Deadlock in Computer Networks
journal, January 1985

Gopal, I.
IEEE Transactions on Communications, Vol. 33, Issue 12
https://doi.org/10.1109/TCOM.1985.1096253

A DAG-Based Algorithm for Prevention of Store-and-Forward Deadlock in Packet Networks
journal, October 1981

Gelernter, David
IEEE Transactions on Computers, Vol. C-30, Issue 10, p. 709-715
https://doi.org/10.1109/TC.1981.1675690

The Universality of the Shuffle-Exchange Network
journal, May 1981

Wu, Chuan-Lin; Feng, Tse-Yun
IEEE Transactions on Computers, Vol. C-30, Issue 5, p. 324-332
https://doi.org/10.1109/TC.1981.1675790

Using the multistage cube network topology in parallel supercomputers
journal, January 1989

Siegel, H. J.; Nation, W. G.; Kruskal, C. P.
Proceedings of the IEEE, Vol. 77, Issue 12
https://doi.org/10.1109/5.48833

The Lens Interconnection Strategy
journal, December 1981

Finkel, R. A.; Solomon, Marvin
IEEE Transactions on Computers, Vol. C-30, Issue 12, p. 960-965
https://doi.org/10.1109/TC.1981.1675735

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Similar Records

Title: Lambda network having 2.sup.m-1 nodes in each of m stages with each node coupled to four other nodes for bidirectional routing of data packets between nodes

Abstract

Citation Formats

Prevention of Deadlocks in Packet-Switched Data Transport Systems journal, April 1981

A Loop-Structured Switching Network journal, May 1984

A fault tolerant massively parallel processing architecture journal, August 1987

An Algorithm for Detecting and Resolving Store-and-Forward Deadlocks in Packet-Switched Networks journal, August 1987

The cube-connected cycles: a versatile network for parallel computation journal, May 1981

Prevention of Store-and-Forward Deadlock in Computer Networks journal, January 1985

A DAG-Based Algorithm for Prevention of Store-and-Forward Deadlock in Packet Networks journal, October 1981

The Universality of the Shuffle-Exchange Network journal, May 1981

Using the multistage cube network topology in parallel supercomputers journal, January 1989

The Lens Interconnection Strategy journal, December 1981

Prevention of Deadlocks in Packet-Switched Data Transport Systems
journal, April 1981

A Loop-Structured Switching Network
journal, May 1984

A fault tolerant massively parallel processing architecture
journal, August 1987

An Algorithm for Detecting and Resolving Store-and-Forward Deadlocks in Packet-Switched Networks
journal, August 1987

The cube-connected cycles: a versatile network for parallel computation
journal, May 1981

Prevention of Store-and-Forward Deadlock in Computer Networks
journal, January 1985

A DAG-Based Algorithm for Prevention of Store-and-Forward Deadlock in Packet Networks
journal, October 1981

The Universality of the Shuffle-Exchange Network
journal, May 1981

Using the multistage cube network topology in parallel supercomputers
journal, January 1989

The Lens Interconnection Strategy
journal, December 1981