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Title: Base drive circuit

Abstract

An improved base drive circuit (10) having a level shifter (24) for providing bistable input signals to a pair of non-linear delays (30, 32). The non-linear delays (30, 32) provide gate control to a corresponding pair of field effect transistors (100, 106) through a corresponding pair of buffer components (88, 94). The non-linear delays (30, 32) provide delayed turn-on for each of the field effect transistors (100, 106) while an associated pair of transistors (72, 80) shunt the non-linear delays (30, 32) during turn-off of the associated field effect transistor (100, 106).

Inventors:
 [1]
  1. Livermore, CA
Issue Date:
Research Org.:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
OSTI Identifier:
869819
Patent Number(s):
5404052
Assignee:
United States of America as represented by United States (Washington, DC)
DOE Contract Number:  
W-7405-ENG-48
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
base; drive; circuit; improved; 10; level; shifter; 24; providing; bistable; input; signals; pair; non-linear; delays; 30; 32; provide; gate; control; corresponding; field; effect; transistors; 100; 106; buffer; components; 88; 94; delayed; turn-on; associated; 72; 80; shunt; turn-off; transistor; field effect; base drive; input signals; input signal; drive circuit; effect transistor; non-linear delays; effect transistors; /327/

Citation Formats

Lange, Arnold C. Base drive circuit. United States: N. p., 1995. Web.
Lange, Arnold C. Base drive circuit. United States.
Lange, Arnold C. Sun . "Base drive circuit". United States. https://www.osti.gov/servlets/purl/869819.
@article{osti_869819,
title = {Base drive circuit},
author = {Lange, Arnold C},
abstractNote = {An improved base drive circuit (10) having a level shifter (24) for providing bistable input signals to a pair of non-linear delays (30, 32). The non-linear delays (30, 32) provide gate control to a corresponding pair of field effect transistors (100, 106) through a corresponding pair of buffer components (88, 94). The non-linear delays (30, 32) provide delayed turn-on for each of the field effect transistors (100, 106) while an associated pair of transistors (72, 80) shunt the non-linear delays (30, 32) during turn-off of the associated field effect transistor (100, 106).},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1995},
month = {1}
}

Patent:

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