Method and apparatus for optimized processing of sparse matrices
Abstract
A computer architecture for processing a sparse matrix is disclosed. The apparatus stores a valuerow vector corresponding to nonzero values of a sparse matrix. Each of the nonzero values is located at a defined row and column position in the matrix. The valuerow vector includes a first vector including nonzero values and delimiting characters indicating a transition from one column to another. The valuerow vector also includes a second vector which defines row position values in the matrix corresponding to the nonzero values in the first vector and column position values in the matrix corresponding to the column position of the nonzero values in the first vector. The architecture also includes a circuit for detecting a special character within the valuerow vector. Matrixvector multiplication is executed on the valuerow vector. This multiplication is performed by multiplying an index value of the first vector value by a column value from a second matrix to form a matrixvector product which is added to a previous matrixvector product.
 Inventors:

 (Evanston, IL)
 Issue Date:
 Research Org.:
 Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
 OSTI Identifier:
 868764
 Patent Number(s):
 5206822
 Assignee:
 Regents of University of California (Oakland, CA) LLNL
 DOE Contract Number:
 W7405ENG48
 Resource Type:
 Patent
 Country of Publication:
 United States
 Language:
 English
 Subject:
 method; apparatus; optimized; processing; sparse; matrices; computer; architecture; matrix; disclosed; stores; valuerow; vector; corresponding; nonzero; values; located; defined; row; column; position; including; delimiting; characters; indicating; transition; defines; circuit; detecting; special; character; matrixvector; multiplication; executed; performed; multiplying; index; value; form; product; added; previous; nonzero values; sparse matrix; zero value; vector corresponding; /708/
Citation Formats
Taylor, Valerie E. Method and apparatus for optimized processing of sparse matrices. United States: N. p., 1993.
Web.
Taylor, Valerie E. Method and apparatus for optimized processing of sparse matrices. United States.
Taylor, Valerie E. Fri .
"Method and apparatus for optimized processing of sparse matrices". United States. https://www.osti.gov/servlets/purl/868764.
@article{osti_868764,
title = {Method and apparatus for optimized processing of sparse matrices},
author = {Taylor, Valerie E.},
abstractNote = {A computer architecture for processing a sparse matrix is disclosed. The apparatus stores a valuerow vector corresponding to nonzero values of a sparse matrix. Each of the nonzero values is located at a defined row and column position in the matrix. The valuerow vector includes a first vector including nonzero values and delimiting characters indicating a transition from one column to another. The valuerow vector also includes a second vector which defines row position values in the matrix corresponding to the nonzero values in the first vector and column position values in the matrix corresponding to the column position of the nonzero values in the first vector. The architecture also includes a circuit for detecting a special character within the valuerow vector. Matrixvector multiplication is executed on the valuerow vector. This multiplication is performed by multiplying an index value of the first vector value by a column value from a second matrix to form a matrixvector product which is added to a previous matrixvector product.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1993},
month = {1}
}