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Title: Selective epitaxy using the gild process

Abstract

The present invention comprises a method of selective epitaxy on a semiconductor substrate. The present invention provides a method of selectively forming high quality, thin GeSi layers in a silicon circuit, and a method for fabricating smaller semiconductor chips with a greater yield (more error free chips) at a lower cost. The method comprises forming an upper layer over a substrate, and depositing a reflectivity mask which is then removed over selected sections. Using a laser to melt the unmasked sections of the upper layer, the semiconductor material in the upper layer is heated and diffused into the substrate semiconductor material. By varying the amount of laser radiation, the epitaxial layer is formed to a controlled depth which may be very thin. When cooled, a single crystal epitaxial layer is formed over the patterned substrate. The present invention provides the ability to selectively grow layers of mixed semiconductors over patterned substrates such as a layer of Ge.sub.x Si.sub.1-x grown over silicon. Such a process may be used to manufacture small transistors that have a narrow base, heavy doping, and high gain. The narrowness allows a faster transistor, and the heavy doping reduces the resistance of the narrow layer. The processmore » does not require high temperature annealing; therefore materials such as aluminum can be used. Furthermore, the process may be used to fabricate diodes that have a high reverse breakdown voltage and a low reverse leakage current.

Inventors:
 [1]
  1. Campbell, CA
Issue Date:
Research Org.:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
OSTI Identifier:
868297
Patent Number(s):
5114876
Assignee:
United States of America as represented by United States (Washington, DC)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC Y10S - TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
DOE Contract Number:  
W-7405-ENG-48
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
selective; epitaxy; gild; process; comprises; method; semiconductor; substrate; provides; selectively; forming; quality; gesi; layers; silicon; circuit; fabricating; chips; yield; error; free; cost; upper; layer; depositing; reflectivity; mask; removed; selected; sections; laser; melt; unmasked; material; heated; diffused; varying; amount; radiation; epitaxial; formed; controlled; depth; cooled; single; crystal; patterned; ability; grow; mixed; semiconductors; substrates; 1-x; grown; manufacture; transistors; narrow; base; heavy; doping; narrowness; allows; faster; transistor; reduces; resistance; require; temperature; annealing; materials; aluminum; furthermore; fabricate; diodes; reverse; breakdown; voltage; leakage; current; semiconductor chip; upper layer; comprises forming; breakdown voltage; semiconductor substrate; method comprises; semiconductor material; single crystal; laser radiation; epitaxial layer; leakage current; method comprise; temperature annealing; temperature anneal; selective epitaxy; patterned substrate; /117/148/438/

Citation Formats

Weiner, Kurt H. Selective epitaxy using the gild process. United States: N. p., 1992. Web.
Weiner, Kurt H. Selective epitaxy using the gild process. United States.
Weiner, Kurt H. Wed . "Selective epitaxy using the gild process". United States. https://www.osti.gov/servlets/purl/868297.
@article{osti_868297,
title = {Selective epitaxy using the gild process},
author = {Weiner, Kurt H},
abstractNote = {The present invention comprises a method of selective epitaxy on a semiconductor substrate. The present invention provides a method of selectively forming high quality, thin GeSi layers in a silicon circuit, and a method for fabricating smaller semiconductor chips with a greater yield (more error free chips) at a lower cost. The method comprises forming an upper layer over a substrate, and depositing a reflectivity mask which is then removed over selected sections. Using a laser to melt the unmasked sections of the upper layer, the semiconductor material in the upper layer is heated and diffused into the substrate semiconductor material. By varying the amount of laser radiation, the epitaxial layer is formed to a controlled depth which may be very thin. When cooled, a single crystal epitaxial layer is formed over the patterned substrate. The present invention provides the ability to selectively grow layers of mixed semiconductors over patterned substrates such as a layer of Ge.sub.x Si.sub.1-x grown over silicon. Such a process may be used to manufacture small transistors that have a narrow base, heavy doping, and high gain. The narrowness allows a faster transistor, and the heavy doping reduces the resistance of the narrow layer. The process does not require high temperature annealing; therefore materials such as aluminum can be used. Furthermore, the process may be used to fabricate diodes that have a high reverse breakdown voltage and a low reverse leakage current.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1992},
month = {1}
}

Works referenced in this record:

Formation of In x Ga 1− x As/GaAs heteroepitaxial layers using a pulsed laser driven rapid melt‐solidification process
journal, May 1990


Epitaxial Ge x Si 1− x /Si (100) structures produced by pulsed laser mixing of evaporated Ge on Si (100) substrates
journal, January 1988