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Title: Electrochemical method for defect delineation in silicon-on-insulator wafers

Abstract

An electrochemical method for defect delineation in thin-film SOI or SOS wafers in which a surface of a silicon wafer is electrically connected so as to control the voltage of the surface within a specified range, the silicon wafer is then contacted with an electrolyte, and, after removing the electrolyte, defects and metal contamination in the silicon wafer are identified.

Inventors:
 [1];  [1];  [1];  [1];  [1];  [1]
  1. Albuquerque, NM
Issue Date:
Research Org.:
AT&T
OSTI Identifier:
867810
Patent Number(s):
5015346
Assignee:
United States Department of Energy (Washington, DC)
Patent Classifications (CPCs):
C - CHEMISTRY C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES C25F - PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS
B - PERFORMING OPERATIONS B23 - MACHINE TOOLS B23H - WORKING OF METAL BY THE ACTION OF A HIGH CONCENTRATION OF ELECTRIC CURRENT ON A WORKPIECE USING AN ELECTRODE WHICH TAKES THE PLACE OF A TOOL
DOE Contract Number:  
AC04-76DP00789
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
electrochemical; method; defect; delineation; silicon-on-insulator; wafers; thin-film; soi; sos; surface; silicon; wafer; electrically; connected; control; voltage; specified; range; contacted; electrolyte; removing; defects; metal; contamination; identified; metal contamination; electrically connected; silicon wafer; electrochemical method; specified range; chemical method; defect delineation; /205/

Citation Formats

Guilinger, Terry R, Jones, Howland D. T., Kelly, Michael J, Medernach, John W, Stevenson, Joel O, and Tsao, Sylvia S. Electrochemical method for defect delineation in silicon-on-insulator wafers. United States: N. p., 1991. Web.
Guilinger, Terry R, Jones, Howland D. T., Kelly, Michael J, Medernach, John W, Stevenson, Joel O, & Tsao, Sylvia S. Electrochemical method for defect delineation in silicon-on-insulator wafers. United States.
Guilinger, Terry R, Jones, Howland D. T., Kelly, Michael J, Medernach, John W, Stevenson, Joel O, and Tsao, Sylvia S. Tue . "Electrochemical method for defect delineation in silicon-on-insulator wafers". United States. https://www.osti.gov/servlets/purl/867810.
@article{osti_867810,
title = {Electrochemical method for defect delineation in silicon-on-insulator wafers},
author = {Guilinger, Terry R and Jones, Howland D. T. and Kelly, Michael J and Medernach, John W and Stevenson, Joel O and Tsao, Sylvia S},
abstractNote = {An electrochemical method for defect delineation in thin-film SOI or SOS wafers in which a surface of a silicon wafer is electrically connected so as to control the voltage of the surface within a specified range, the silicon wafer is then contacted with an electrolyte, and, after removing the electrolyte, defects and metal contamination in the silicon wafer are identified.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1991},
month = {1}
}

Patent:

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