Method of making high breakdown voltage semiconductor device
Abstract
A semiconductor device having at least one P-N junction and a multiple-zone junction termination extension (JTE) region which uniformly merges with the reverse blocking junction is disclosed. The blocking junction is graded into multiple zones of lower concentration dopant adjacent termination to facilitate merging of the JTE to the blocking junction and placing of the JTE at or near the high field point of the blocking junction. Preferably, the JTE region substantially overlaps the graded blocking junction region. A novel device fabrication method is also provided which eliminates the prior art step of separately diffusing the JTE region.
- Inventors:
-
- Scotia, NY
- Jonesville, NY
- Issue Date:
- OSTI Identifier:
- 867396
- Patent Number(s):
- 4927772
- Assignee:
- General Electric Company (Schenectady, NY)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC Y10S - TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- DOE Contract Number:
- AC07-84NV10418
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- method; breakdown; voltage; semiconductor; device; p-n; junction; multiple-zone; termination; extension; jte; region; uniformly; merges; reverse; blocking; disclosed; graded; multiple; zones; concentration; dopant; adjacent; facilitate; merging; placing; near; field; preferably; substantially; overlaps; novel; fabrication; provided; eliminates; prior; step; separately; diffusing; device fabrication; fabrication method; p-n junction; breakdown voltage; semiconductor device; multiple zones; novel device; multiple zone; substantially overlap; junction region; /438/
Citation Formats
Arthur, Stephen D, and Temple, Victor A. K. Method of making high breakdown voltage semiconductor device. United States: N. p., 1990.
Web.
Arthur, Stephen D, & Temple, Victor A. K. Method of making high breakdown voltage semiconductor device. United States.
Arthur, Stephen D, and Temple, Victor A. K. Mon .
"Method of making high breakdown voltage semiconductor device". United States. https://www.osti.gov/servlets/purl/867396.
@article{osti_867396,
title = {Method of making high breakdown voltage semiconductor device},
author = {Arthur, Stephen D and Temple, Victor A. K.},
abstractNote = {A semiconductor device having at least one P-N junction and a multiple-zone junction termination extension (JTE) region which uniformly merges with the reverse blocking junction is disclosed. The blocking junction is graded into multiple zones of lower concentration dopant adjacent termination to facilitate merging of the JTE to the blocking junction and placing of the JTE at or near the high field point of the blocking junction. Preferably, the JTE region substantially overlaps the graded blocking junction region. A novel device fabrication method is also provided which eliminates the prior art step of separately diffusing the JTE region.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Mon Jan 01 00:00:00 EST 1990},
month = {Mon Jan 01 00:00:00 EST 1990}
}
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