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Title: Sputtered pin amorphous silicon semi-conductor device and method therefor

Abstract

A high efficiency amorphous silicon PIN semi-conductor device is constructed by the sequential sputtering of N, I and P layers of amorphous silicon and at least one semi-transparent ohmic electrode. A method of construction produces a PIN device, exhibiting enhanced physical integrity and facilitates ease of construction in a singular vacuum system and vacuum pump down procedure.

Inventors:
 [1];  [2]
  1. (Berkeley Heights, NJ)
  2. (Milford, NJ)
Issue Date:
Research Org.:
Solar Energy Research Institute
OSTI Identifier:
864793
Patent Number(s):
4417092
Application Number:
06/243,754
Assignee:
Exxon Research and Engineering Co. (Florham Park, NJ) OSTI
DOE Contract Number:  
XZ-0-9219
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
sputtered; amorphous; silicon; semi-conductor; device; method; efficiency; constructed; sequential; sputtering; layers; semi-transparent; ohmic; electrode; construction; produces; exhibiting; enhanced; physical; integrity; facilitates; ease; singular; vacuum; pump; procedure; amorphous silicon; vacuum pump; semi-conductor device; semi-transparent ohmic; ohmic electrode; sequential sputtering; silicon semi-conductor; exhibiting enhanced; transparent ohmic; efficiency amorphous; /136/204/257/

Citation Formats

Moustakas, Theodore D., and Friedman, Robert A. Sputtered pin amorphous silicon semi-conductor device and method therefor. United States: N. p., 1983. Web.
Moustakas, Theodore D., & Friedman, Robert A. Sputtered pin amorphous silicon semi-conductor device and method therefor. United States.
Moustakas, Theodore D., and Friedman, Robert A. Tue . "Sputtered pin amorphous silicon semi-conductor device and method therefor". United States. https://www.osti.gov/servlets/purl/864793.
@article{osti_864793,
title = {Sputtered pin amorphous silicon semi-conductor device and method therefor},
author = {Moustakas, Theodore D. and Friedman, Robert A.},
abstractNote = {A high efficiency amorphous silicon PIN semi-conductor device is constructed by the sequential sputtering of N, I and P layers of amorphous silicon and at least one semi-transparent ohmic electrode. A method of construction produces a PIN device, exhibiting enhanced physical integrity and facilitates ease of construction in a singular vacuum system and vacuum pump down procedure.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1983},
month = {11}
}

Patent:

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