Reduction in maximum time uncertainty of paired time signals
Abstract
Reduction in the maximum time uncertainty (t[sub max]--t[sub min]) of a series of paired time signals t[sub 1] and t[sub 2] varying between two input terminals and representative of a series of single events where t[sub 1][<=]t[sub 2] and t[sub 1]+t[sub 2] equals a constant, is carried out with a circuit utilizing a combination of OR and AND gates as signal selecting means and one or more time delays to increase the minimum value (t[sub min]) of the first signal t[sub 1] closer to t[sub max] and thereby reduce the difference. The circuit may utilize a plurality of stages to reduce the uncertainty by factors of 20--800. 6 figs.
- Inventors:
- Issue Date:
- OSTI Identifier:
- 7146557
- Patent Number(s):
- 4408297
- Application Number:
- PPN: US 6-233533
- Assignee:
- PTO; EDB-94-125339
- DOE Contract Number:
- W-31109-ENG-38
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 11 Feb 1981
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING; 47 OTHER INSTRUMENTATION; TIMING CIRCUITS; DESIGN; DATA COVARIANCES; MEASURING INSTRUMENTS; TIMING PROPERTIES; ELECTRONIC CIRCUITS; 426000* - Engineering- Components, Electron Devices & Circuits- (1990-); 440000 - Instrumentation
Citation Formats
Theodosiou, G E, and Dawson, J W. Reduction in maximum time uncertainty of paired time signals. United States: N. p., 1983.
Web.
Theodosiou, G E, & Dawson, J W. Reduction in maximum time uncertainty of paired time signals. United States.
Theodosiou, G E, and Dawson, J W. Tue .
"Reduction in maximum time uncertainty of paired time signals". United States.
@article{osti_7146557,
title = {Reduction in maximum time uncertainty of paired time signals},
author = {Theodosiou, G E and Dawson, J W},
abstractNote = {Reduction in the maximum time uncertainty (t[sub max]--t[sub min]) of a series of paired time signals t[sub 1] and t[sub 2] varying between two input terminals and representative of a series of single events where t[sub 1][<=]t[sub 2] and t[sub 1]+t[sub 2] equals a constant, is carried out with a circuit utilizing a combination of OR and AND gates as signal selecting means and one or more time delays to increase the minimum value (t[sub min]) of the first signal t[sub 1] closer to t[sub max] and thereby reduce the difference. The circuit may utilize a plurality of stages to reduce the uncertainty by factors of 20--800. 6 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Oct 04 00:00:00 EDT 1983},
month = {Tue Oct 04 00:00:00 EDT 1983}
}
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