DOE Patents title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Attachment method for stacked integrated circuit (IC) chips

Abstract

An attachment method for stacked integrated circuit (IC) chips is disclosed. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwisemore » simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM. 12 figs.

Inventors:
;
Issue Date:
Research Org.:
Univ. of California (United States)
Sponsoring Org.:
USDOE, Washington, DC (United States)
OSTI Identifier:
678611
Patent Number(s):
5933712
Application Number:
PAN: 9-045,626
Assignee:
Univ. of California, Oakland, CA (United States)
DOE Contract Number:  
W-7405-ENG-48
Resource Type:
Patent
Resource Relation:
Other Information: PBD: 3 Aug 1999
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING NOT INCLUDED IN OTHER CATEGORIES; INTEGRATED CIRCUITS; SEMICONDUCTOR STORAGE DEVICES; LAYERS; CONNECTORS; BONDING; DESIGN

Citation Formats

Bernhardt, A F, and Malba, V. Attachment method for stacked integrated circuit (IC) chips. United States: N. p., 1999. Web.
Bernhardt, A F, & Malba, V. Attachment method for stacked integrated circuit (IC) chips. United States.
Bernhardt, A F, and Malba, V. Tue . "Attachment method for stacked integrated circuit (IC) chips". United States.
@article{osti_678611,
title = {Attachment method for stacked integrated circuit (IC) chips},
author = {Bernhardt, A F and Malba, V},
abstractNote = {An attachment method for stacked integrated circuit (IC) chips is disclosed. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM. 12 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1999},
month = {8}
}

Patent:
Search for the full text at the U.S. Patent and Trademark Office Note: You will be redirected to the USPTO site, which may require a pop-up blocker to be deactivated to view the patent. If so, you will need to manually turn off your browser's pop-up blocker, typically found within the browser settings. (See DOE Patents FAQs for more information.)

Save / Share: