Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment
Abstract
A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on themore »
- Inventors:
- Issue Date:
- Research Org.:
- Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
- Sponsoring Org.:
- USDOE, Washington, DC (United States)
- OSTI Identifier:
- 672580
- Patent Number(s):
- 5783340
- Application Number:
- PAN: 8-903,985
- Assignee:
- Sandia Corp., Albuquerque, NM (United States)
- DOE Contract Number:
- AC04-94AL85000
- Resource Type:
- Patent
- Resource Relation:
- Other Information: PBD: 21 Jul 1998
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING NOT INCLUDED IN OTHER CATEGORIES; FABRICATION; SEMICONDUCTOR DEVICES; SCREEN PRINTING; MASKING; OPTICAL SYSTEMS; MICROELECTRONICS
Citation Formats
Farino, A J, Montague, S, Sniegowski, J J, Smith, J H, and McWhorter, P J. Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment. United States: N. p., 1998.
Web.
Farino, A J, Montague, S, Sniegowski, J J, Smith, J H, & McWhorter, P J. Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment. United States.
Farino, A J, Montague, S, Sniegowski, J J, Smith, J H, and McWhorter, P J. Tue .
"Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment". United States.
@article{osti_672580,
title = {Method for photolithographic definition of recessed features on a semiconductor wafer utilizing auto-focusing alignment},
author = {Farino, A J and Montague, S and Sniegowski, J J and Smith, J H and McWhorter, P J},
abstractNote = {A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined. As material layers are deposited in each device cavity to build up a semiconductor structure such as a microelectromechanical system (MEMS) device, the same material layers are deposited in the focusing cavity, raising the bottom surface and re-focusing the stepper for accurately defining additional device features in each succeeding material layer. The method is especially applicable for forming MEMS devices within a cavity or trench and integrating the MEMS devices with electronic circuitry fabricated on the wafer surface. 15 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jul 21 00:00:00 EDT 1998},
month = {Tue Jul 21 00:00:00 EDT 1998}
}