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Title: Thin-film chip-to-substrate interconnect and methods for making same

Abstract

Integrated circuit chips are electrically connected to a silicon wafer interconnection substrate. Thin film wiring is fabricated down bevelled edges of the chips. A subtractive wire fabrication method uses a series of masks and etching steps to form wires in a metal layer. An additive method direct laser writes or deposits very thin lines which can then be plated up to form wires. A quasi-additive or subtractive/additive method forms a pattern of trenches to expose a metal surface which can nucleate subsequent electrolytic deposition of wires. Low inductance interconnections on a 25 micron pitch (1600 wires on a 1 cm square chip) can be produced. The thin film hybrid interconnect eliminates solder joints or welds, and minimizes the levels of metallization. Advantages include good electrical properties, very high wiring density, excellent backside contact, compactness, and high thermal and mechanical reliability. 6 figs.

Inventors:
Issue Date:
Research Org.:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
OSTI Identifier:
6277342
Patent Number(s):
7202296
Application Number:
ON: DE89009657
Assignee:
Dept. of Energy
Patent Classifications (CPCs):
C - CHEMISTRY C08 - ORGANIC MACROMOLECULAR COMPOUNDS C08J - WORKING-UP
C - CHEMISTRY C08 - ORGANIC MACROMOLECULAR COMPOUNDS C08K - Use of inorganic or non-macromolecular organic substances as compounding ingredients
DOE Contract Number:  
W-7405-ENG-48
Resource Type:
Patent
Resource Relation:
Other Information: Portions of this document are illegible in microfiche products
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING; INTEGRATED CIRCUITS; FABRICATION; DEPOSITION; DESIGN; ELECTRICAL PROPERTIES; INVENTIONS; SILICON; SUBSTRATES; THIN FILMS; WIRES; ELECTRONIC CIRCUITS; ELEMENTS; FILMS; MICROELECTRONIC CIRCUITS; PHYSICAL PROPERTIES; SEMIMETALS; 420800* - Engineering- Electronic Circuits & Devices- (-1989)

Citation Formats

Tuckerman, D. B.. Thin-film chip-to-substrate interconnect and methods for making same. United States: N. p., 1988. Web.
Tuckerman, D. B.. Thin-film chip-to-substrate interconnect and methods for making same. United States.
Tuckerman, D. B.. Mon . "Thin-film chip-to-substrate interconnect and methods for making same". United States. https://www.osti.gov/servlets/purl/6277342.
@article{osti_6277342,
title = {Thin-film chip-to-substrate interconnect and methods for making same},
author = {Tuckerman, D. B.},
abstractNote = {Integrated circuit chips are electrically connected to a silicon wafer interconnection substrate. Thin film wiring is fabricated down bevelled edges of the chips. A subtractive wire fabrication method uses a series of masks and etching steps to form wires in a metal layer. An additive method direct laser writes or deposits very thin lines which can then be plated up to form wires. A quasi-additive or subtractive/additive method forms a pattern of trenches to expose a metal surface which can nucleate subsequent electrolytic deposition of wires. Low inductance interconnections on a 25 micron pitch (1600 wires on a 1 cm square chip) can be produced. The thin film hybrid interconnect eliminates solder joints or welds, and minimizes the levels of metallization. Advantages include good electrical properties, very high wiring density, excellent backside contact, compactness, and high thermal and mechanical reliability. 6 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1988},
month = {6}
}