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Title: Three dimensional, multi-chip module

A plurality of multi-chip modules are stacked and bonded around the perimeter by sold-bump bonds to adjacent modules on, for instance, three sides of the perimeter. The fourth side can be used for coolant distribution, for more interconnect structures, or other features, depending on particular design considerations of the chip set. The multi-chip modules comprise a circuit board, having a planarized interconnect structure formed on a first major surface, and integrated circuit chips bonded to the planarized interconnect surface. Around the periphery of each circuit board, long, narrow dummy chips'' are bonded to the finished circuit board to form a perimeter wall. The wall is higher than any of the chips on the circuit board, so that the flat back surface of the board above will only touch the perimeter wall. Module-to-module interconnect is laser-patterned on the sides of the boards and over the perimeter wall in the same way and at the same time that chip to board interconnect may be laser-patterned.
Inventors:
;
Issue Date:
OSTI Identifier:
6229718
Assignee:
Dept. of Energy, Washington, DC (United States) IMS; EDB-93-122220
Patent Number(s):
US 5241450; A
Application Number:
PPN: US 7-850642
Contract Number:
W-7405-ENG-48
Resource Relation:
Patent File Date: 13 Mar 1992
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING; MICROELECTRONIC CIRCUITS; DESIGN; BONDING; COOLANTS; ETCHING; INTEGRATED CIRCUITS; LAYERS; ELECTRONIC CIRCUITS; FABRICATION; JOINING; SURFACE FINISHING; 426000* - Engineering- Components, Electron Devices & Circuits- (1990-)