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Title: Improvements in floating point addition/subtraction operations

Abstract

Apparatus is described for decreasing the latency time associated with floating point addition and subtraction in a computer, using a novel bifurcated, pre-normalization/post-normalization approach that distinguishes between differences of floating point exponents.

Inventors:
Issue Date:
OSTI Identifier:
6101400
Application Number:
ON: TI85006009
Assignee:
Dept of Energy
DOE Contract Number:  
W-7405-ENG-48
Resource Type:
Patent
Resource Relation:
Other Information: Portions are illegible in microfiche products
Country of Publication:
United States
Language:
English
Subject:
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; DATA PROCESSING; CALCULATION METHODS; COMPUTER CALCULATIONS; DIGITAL COMPUTERS; MATHEMATICS; PROGRAMMING; COMPUTERS; PROCESSING; 990200* - Mathematics & Computers

Citation Formats

Farmwald, P M. Improvements in floating point addition/subtraction operations. United States: N. p., 1984. Web.
Farmwald, P M. Improvements in floating point addition/subtraction operations. United States.
Farmwald, P M. Fri . "Improvements in floating point addition/subtraction operations". United States.
@article{osti_6101400,
title = {Improvements in floating point addition/subtraction operations},
author = {Farmwald, P M},
abstractNote = {Apparatus is described for decreasing the latency time associated with floating point addition and subtraction in a computer, using a novel bifurcated, pre-normalization/post-normalization approach that distinguishes between differences of floating point exponents.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1984},
month = {2}
}

Patent:
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