Improved method of preparing p-i-n junctions in amorphous silicon semiconductors
Abstract
A method of preparing p/sup +/-i-n/sup +/ junctions for amorphous silicon semiconductors includes depositing amorphous silicon on a thin layer of trivalent material, such as aluminum, indium, or gallium at a temperature in the range of 200/sup 0/C to 250/sup 0/C. At this temperature, the layer of trivalent material diffuses into the amorphous silicon to form a graded p/sup +/-i junction. A layer of n-type doped material is then deposited onto the intrinsic amorphous silicon layer in a conventional manner to finish forming the p/sup +/-i-n/sup +/ junction.
- Inventors:
- Issue Date:
- Research Org.:
- Solar Energy Research Inst. (SERI), Golden, CO (United States)
- OSTI Identifier:
- 5421009
- Application Number:
- ON: DE85017736
- Assignee:
- Dept. of Energy
- DOE Contract Number:
- AC02-83CH10093
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 14 SOLAR ENERGY; 36 MATERIALS SCIENCE; SEMICONDUCTOR JUNCTIONS; FABRICATION; SILICON SOLAR CELLS; AMORPHOUS STATE; DEPOSITION; DOPED MATERIALS; SEMICONDUCTOR MATERIALS; SILICON; DIRECT ENERGY CONVERTERS; ELEMENTS; EQUIPMENT; JUNCTIONS; MATERIALS; PHOTOELECTRIC CELLS; PHOTOVOLTAIC CELLS; SEMIMETALS; SOLAR CELLS; SOLAR EQUIPMENT; 140501* - Solar Energy Conversion- Photovoltaic Conversion; 360601 - Other Materials- Preparation & Manufacture
Citation Formats
Madan, A. Improved method of preparing p-i-n junctions in amorphous silicon semiconductors. United States: N. p., 1984.
Web.
Madan, A. Improved method of preparing p-i-n junctions in amorphous silicon semiconductors. United States.
Madan, A. Mon .
"Improved method of preparing p-i-n junctions in amorphous silicon semiconductors". United States.
@article{osti_5421009,
title = {Improved method of preparing p-i-n junctions in amorphous silicon semiconductors},
author = {Madan, A},
abstractNote = {A method of preparing p/sup +/-i-n/sup +/ junctions for amorphous silicon semiconductors includes depositing amorphous silicon on a thin layer of trivalent material, such as aluminum, indium, or gallium at a temperature in the range of 200/sup 0/C to 250/sup 0/C. At this temperature, the layer of trivalent material diffuses into the amorphous silicon to form a graded p/sup +/-i junction. A layer of n-type doped material is then deposited onto the intrinsic amorphous silicon layer in a conventional manner to finish forming the p/sup +/-i-n/sup +/ junction.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1984},
month = {12}
}
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