System level latchup mitigation for single event and transient radiation effects on electronics
Abstract
A ``blink`` technique, analogous to a person blinking at a flash of bright light, is provided for mitigating the effects of single event current latchup and prompt pulse destructive radiation on a micro-electronic circuit. The system includes event detection circuitry, power dump logic circuitry, and energy limiting measures with autonomous recovery. The event detection circuitry includes ionizing radiation pulse detection means for detecting a pulse of ionizing radiation and for providing at an output terminal thereof a detection signal indicative of the detection of a pulse of ionizing radiation. The current sensing circuitry is coupled to the power bus for determining an occurrence of excess current through the power bus caused by ionizing radiation or by ion-induced destructive latchup of a semiconductor device. The power dump circuitry includes power dump logic circuitry having a first input terminal connected to the output terminal of the ionizing radiation pulse detection circuitry and having a second input terminal connected to the output terminal of the current sensing circuitry. The power dump logic circuitry provides an output signal to the input terminal of the circuitry for opening the power bus and the circuitry for shorting the power bus to a ground potential to removemore »
- Inventors:
- Issue Date:
- Research Org.:
- Univ. of California (United States)
- Sponsoring Org.:
- USDOE, Washington, DC (United States)
- OSTI Identifier:
- 541760
- Patent Number(s):
- 5672918
- Application Number:
- PAN: 8-291,086
- Assignee:
- Dept. of Energy, Washington, DC (United States)
- DOE Contract Number:
- W-7405-ENG-48
- Resource Type:
- Patent
- Resource Relation:
- Other Information: PBD: 30 Sep 1997
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING NOT INCLUDED IN OTHER CATEGORIES; MICROELECTRONIC CIRCUITS; EQUIPMENT PROTECTION DEVICES; PHYSICAL RADIATION EFFECTS; MITIGATION; RADIATION DETECTION; ELECTRICAL FAULTS
Citation Formats
Kimbrough, J R, and Colella, N J. System level latchup mitigation for single event and transient radiation effects on electronics. United States: N. p., 1997.
Web.
Kimbrough, J R, & Colella, N J. System level latchup mitigation for single event and transient radiation effects on electronics. United States.
Kimbrough, J R, and Colella, N J. Tue .
"System level latchup mitigation for single event and transient radiation effects on electronics". United States.
@article{osti_541760,
title = {System level latchup mitigation for single event and transient radiation effects on electronics},
author = {Kimbrough, J R and Colella, N J},
abstractNote = {A ``blink`` technique, analogous to a person blinking at a flash of bright light, is provided for mitigating the effects of single event current latchup and prompt pulse destructive radiation on a micro-electronic circuit. The system includes event detection circuitry, power dump logic circuitry, and energy limiting measures with autonomous recovery. The event detection circuitry includes ionizing radiation pulse detection means for detecting a pulse of ionizing radiation and for providing at an output terminal thereof a detection signal indicative of the detection of a pulse of ionizing radiation. The current sensing circuitry is coupled to the power bus for determining an occurrence of excess current through the power bus caused by ionizing radiation or by ion-induced destructive latchup of a semiconductor device. The power dump circuitry includes power dump logic circuitry having a first input terminal connected to the output terminal of the ionizing radiation pulse detection circuitry and having a second input terminal connected to the output terminal of the current sensing circuitry. The power dump logic circuitry provides an output signal to the input terminal of the circuitry for opening the power bus and the circuitry for shorting the power bus to a ground potential to remove power from the power bus. The energy limiting circuitry with autonomous recovery includes circuitry for opening the power bus and circuitry for shorting the power bus to a ground potential. The circuitry for opening the power bus and circuitry for shorting the power bus to a ground potential includes a series FET and a shunt FET. The invention provides for self-contained sensing for latchup, first removal of power to protect latched components, and autonomous recovery to enable transparent operation of other system elements. 18 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1997},
month = {9}
}