Transistors using crystalline silicon devices on glass
Abstract
A method is disclosed for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed. 13 figs.
- Inventors:
- Issue Date:
- Research Org.:
- Univ. of California (United States)
- OSTI Identifier:
- 46307
- Patent Number(s):
- 5414276
- Application Number:
- PAN: 8-137,402
- Assignee:
- Univ. of California, Oakland, CA (United States)
- DOE Contract Number:
- W-7405-ENG-48
- Resource Type:
- Patent
- Resource Relation:
- Other Information: PBD: 9 May 1995
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING NOT INCLUDED IN OTHER CATEGORIES; TRANSISTORS; FABRICATION; ELECTRIC POTENTIAL; ELECTRIC CURRENTS; MONOCRYSTALS
Citation Formats
McCarthy, A M. Transistors using crystalline silicon devices on glass. United States: N. p., 1995.
Web.
McCarthy, A M. Transistors using crystalline silicon devices on glass. United States.
McCarthy, A M. Tue .
"Transistors using crystalline silicon devices on glass". United States.
@article{osti_46307,
title = {Transistors using crystalline silicon devices on glass},
author = {McCarthy, A M},
abstractNote = {A method is disclosed for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed. 13 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1995},
month = {5}
}
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