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Title: MULTI-CHANNEL ELECTRIC PULSE HEIGHT ANALYZER

Abstract

An apparatus is given for converting binary information into coded decimal form comprising means, in combination with a binary adder, a live memory and a source of bigit pulses, for synchronizing the bigit pulses and the adder output pulses; a source of digit pulses synchronized with every fourth bigit pulse; means for generating a conversion pulse in response to the time coincidence of the adder output pulse and a digit pulse: means having a delay equal to two bigit pulse periods coupling the adder output with the memory; means for promptly impressing said conversion pulse on the input of said memory: and means having a delay equal to one bigit pulse period for again impressing the conversion pulse on the input of the memory whereby a fourth bigit adder pulse results in the insertion into the memory of second, third and fourth bigits.

Inventors:
Issue Date:
Research Org.:
Originating Research Org. not identified
OSTI Identifier:
4112612
Patent Number(s):
2961159
Assignee:
U.S. Atomic Energy Commission DTIE; NSA-15-007605
NSA Number:
NSA-15-007605
Resource Type:
Patent
Resource Relation:
Other Information: Orig. Receipt Date: 31-DEC-61
Country of Publication:
United States
Language:
English
Subject:
ENGINEERING AND EQUIPMENT; PERFORMANCE; PULSE ANALYZERS; PULSES

Citation Formats

Gallagher, J.D. et al. MULTI-CHANNEL ELECTRIC PULSE HEIGHT ANALYZER. United States: N. p., 1960. Web.
Gallagher, J.D. et al. MULTI-CHANNEL ELECTRIC PULSE HEIGHT ANALYZER. United States.
Gallagher, J.D. et al. Tue . "MULTI-CHANNEL ELECTRIC PULSE HEIGHT ANALYZER". United States.
@article{osti_4112612,
title = {MULTI-CHANNEL ELECTRIC PULSE HEIGHT ANALYZER},
author = {Gallagher, J.D. et al.},
abstractNote = {An apparatus is given for converting binary information into coded decimal form comprising means, in combination with a binary adder, a live memory and a source of bigit pulses, for synchronizing the bigit pulses and the adder output pulses; a source of digit pulses synchronized with every fourth bigit pulse; means for generating a conversion pulse in response to the time coincidence of the adder output pulse and a digit pulse: means having a delay equal to two bigit pulse periods coupling the adder output with the memory; means for promptly impressing said conversion pulse on the input of said memory: and means having a delay equal to one bigit pulse period for again impressing the conversion pulse on the input of the memory whereby a fourth bigit adder pulse results in the insertion into the memory of second, third and fourth bigits.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1960},
month = {11}
}