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Title: Image matrix processor for fast multi-dimensional computations

An apparatus for multi-dimensional computation is disclosed which comprises a computation engine, including a plurality of processing modules. The processing modules are configured in parallel and compute respective contributions to a computed multi-dimensional image of respective two dimensional data sets. A high-speed, parallel access storage system is provided which stores the multi-dimensional data sets, and a switching circuit routes the data among the processing modules in the computation engine and the storage system. A data acquisition port receives the two dimensional data sets representing projections through an image, for reconstruction algorithms such as encountered in computerized tomography. The processing modules include a programmable local host, by which they may be configured to execute a plurality of different types of multi-dimensional algorithms. The processing modules thus include an image manipulation processor, which includes a source cache, a target cache, a coefficient table, and control software for executing image transformation routines using data in the source cache and the coefficient table and loading resulting data in the target cache. The local host processor operates to load the source cache with a two dimensional data set, loads the coefficient table, and transfers resulting data out of the target cache to the storage system,more » or to another destination. 10 figs.« less
Inventors:
;
Issue Date:
OSTI Identifier:
379935
Assignee:
Univ. of California, Oakland, CA (United States) PTO; SCA: 990200; PA: EDB-96:153793; SN: 96001674294
Patent Number(s):
US 5,566,341/A/
Application Number:
PAN: 7-957,511
Contract Number:
W-7405-ENG-48
Resource Relation:
Other Information: PBD: 15 Oct 1996
Research Org:
University of California
Country of Publication:
United States
Language:
English
Subject:
99 MATHEMATICS, COMPUTERS, INFORMATION SCIENCE, MANAGEMENT, LAW, MISCELLANEOUS; IMAGE PROCESSING; PARALLEL PROCESSING; COMPUTERS; DESIGN; DATA TRANSMISSION; EXECUTIVE CODES