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Title: High efficiency low cost thin film silicon solar cell design and method for making

Abstract

A semiconductor device is described having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt,more » and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer. 9 figs.« less

Inventors:
Issue Date:
Research Org.:
National Renewable Energy Lab. (NREL), Golden, CO (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
350315
Patent Number(s):
5897331
Application Number:
PAN: 8-745,951
Assignee:
Midwest Research Inst., Kansas City, MO (United States)
DOE Contract Number:  
AC02-83CH10093
Resource Type:
Patent
Resource Relation:
Other Information: PBD: 27 Apr 1999
Country of Publication:
United States
Language:
English
Subject:
14 SOLAR ENERGY; SILICON SOLAR CELLS; DESIGN; FABRICATION; SUBSTRATES; DEPOSITION; HEAT TREATMENTS; GRAIN SIZE; SILICON

Citation Formats

Sopori, B. L. High efficiency low cost thin film silicon solar cell design and method for making. United States: N. p., 1999. Web.
Sopori, B. L. High efficiency low cost thin film silicon solar cell design and method for making. United States.
Sopori, B. L. Tue . "High efficiency low cost thin film silicon solar cell design and method for making". United States.
@article{osti_350315,
title = {High efficiency low cost thin film silicon solar cell design and method for making},
author = {Sopori, B. L.},
abstractNote = {A semiconductor device is described having a substrate, a conductive intermediate layer deposited onto said substrate, wherein the intermediate layer serves as a back electrode, an optical reflector, and an interface for impurity gettering, and a semiconductor layer deposited onto said intermediate layer, wherein the semiconductor layer has a grain size at least as large as the layer thickness, and preferably about ten times the layer thickness. The device is formed by depositing a metal layer on a substrate, depositing a semiconductive material on the metal-coated substrate to produce a composite structure, and then optically processing the composite structure by illuminating it with infrared electromagnetic radiation according to a unique time-energy profile that first produces pits in the backside surface of the semiconductor material, then produces a thin, highly reflective, low resistivity alloy layer over the entire area of the interface between the semiconductor material and the metal layer, and finally produces a grain-enhanced semiconductor layer. The time-energy profile includes increasing the energy to a first energy level to initiate pit formation and create the desired pit size and density, then ramping up to a second energy level in which the entire device is heated to produce an interfacial melt, and finally reducing the energy to a third energy level and holding for a period of time to allow enhancement in the grain size of the semiconductor layer. 9 figs.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {1999},
month = {4}
}