Tunable doping of carbon nanotubes through engineered atomic layer deposition
Abstract
A carbon nanotube field effect transistor (CNFET), that has a channel formed of carbon nanotubes (CNTs), includes a layered deposit of a nonstoichiometric doping oxide (NDO), such as HfOX, where the concentration of the NDO varies through the thickness of the layer(s). An n-type metal-oxide semiconductor (NMOS) CNFET made in this manner can achieve similar ON-current, OFF-current, and/or threshold voltage magnitudes to a corresponding p-type metal-oxide semiconductor (PMOS) CNFET. Such an NMOS and PMOS can be used to achieve a symmetric complementary metal-oxide semiconductor (CMOS) CNFET design.
- Issue Date:
- Research Org.:
- Massachusetts Inst. of Technology (MIT), Cambridge, MA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 2293932
- Patent Number(s):
- 11832458
- Application Number:
- 17/211,329
- Assignee:
- Massachusetts Institute of Technology (Cambridge, MA)
- DOE Contract Number:
- W909MY-16-1-0001
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 03/24/2021
- Country of Publication:
- United States
- Language:
- English
Citation Formats
. Tunable doping of carbon nanotubes through engineered atomic layer deposition. United States: N. p., 2023.
Web.
. Tunable doping of carbon nanotubes through engineered atomic layer deposition. United States.
. Tue .
"Tunable doping of carbon nanotubes through engineered atomic layer deposition". United States. https://www.osti.gov/servlets/purl/2293932.
@article{osti_2293932,
title = {Tunable doping of carbon nanotubes through engineered atomic layer deposition},
author = {},
abstractNote = {A carbon nanotube field effect transistor (CNFET), that has a channel formed of carbon nanotubes (CNTs), includes a layered deposit of a nonstoichiometric doping oxide (NDO), such as HfOX, where the concentration of the NDO varies through the thickness of the layer(s). An n-type metal-oxide semiconductor (NMOS) CNFET made in this manner can achieve similar ON-current, OFF-current, and/or threshold voltage magnitudes to a corresponding p-type metal-oxide semiconductor (PMOS) CNFET. Such an NMOS and PMOS can be used to achieve a symmetric complementary metal-oxide semiconductor (CMOS) CNFET design.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2023},
month = {11}
}
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