Title: High-bandwidth reconfigurable data acquisition card

Abstract

A reconfigurable data acquisition card including at least one field programmable gate array (FPGA) and a configurable bus switch coupled with the FPGA. The bus switch forms at least first and second ports used by the FPGA, the bus switch being adaptable for insertion into a connection having a number of lanes at least equal to a combined number of lanes in the first and second ports. The data acquisition card further includes multiple optical transmitters and optical receivers. Each optical transmitter and optical receiver is coupled with a corresponding transceiver in the FPGA via at least one optical fiber having multiple communication links. Timing circuitry in the data acquisition card is coupled with clock generation and distribution circuitry in the FPGA and is configured to distribute clock and timing signals to detector front-ends with fixed latency and to synchronize input/output links with a system clock generated by the FPGA.

Inventors:

Chen, Kai; Begel, Michael; Chen, Hucheng; Lanni, Francesco

Issue Date:

2023-11-14

Research Org.:

Brookhaven National Laboratory (BNL), Upton, NY (United States)

Sponsoring Org.:

USDOE

OSTI Identifier:

2293873

Patent Number(s):

11816053

Application Number:

17/428,810

Assignee:

Brookhaven Science Associates, LLC (Upton, NY)

DOE Contract Number:  

SC0012704

Resource Type:

Patent

Resource Relation:

Patent File Date: 09/23/2019

Country of Publication:

United States

Language:

English