Self-regulating power management for a neural network system
Abstract
A neural network runs a known input data set using an error free power setting and using an error prone power setting. The differences in the outputs of the neural network using the two different power settings determine a high level error rate associated with the output of the neural network using the error prone power setting. If the high level error rate is excessive, the error prone power setting is adjusted to reduce errors by changing voltage and/or clock frequency utilized by the neural network system. If the high level error rate is within bounds, the error prone power setting can remain allowing the neural network to operate with an acceptable error tolerance and improved efficiency. The error tolerance can be specified by the neural network application.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Santa Clara, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 2222287
- Patent Number(s):
- 11748186
- Application Number:
- 17/712,380
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- DOE Contract Number:
- AC52-07NA27344; B620717
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 04/04/2022
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Kegel, Andrew G., and Roberts, David A. Self-regulating power management for a neural network system. United States: N. p., 2023.
Web.
Kegel, Andrew G., & Roberts, David A. Self-regulating power management for a neural network system. United States.
Kegel, Andrew G., and Roberts, David A. Tue .
"Self-regulating power management for a neural network system". United States. https://www.osti.gov/servlets/purl/2222287.
@article{osti_2222287,
title = {Self-regulating power management for a neural network system},
author = {Kegel, Andrew G. and Roberts, David A.},
abstractNote = {A neural network runs a known input data set using an error free power setting and using an error prone power setting. The differences in the outputs of the neural network using the two different power settings determine a high level error rate associated with the output of the neural network using the error prone power setting. If the high level error rate is excessive, the error prone power setting is adjusted to reduce errors by changing voltage and/or clock frequency utilized by the neural network system. If the high level error rate is within bounds, the error prone power setting can remain allowing the neural network to operate with an acceptable error tolerance and improved efficiency. The error tolerance can be specified by the neural network application.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2023},
month = {9}
}
Works referenced in this record:
Selective noise tolerance modes of operation in a memory
patent-application, October 2018
- Kurian, Dileep J.; V., Ambili; Divakar, Dilin
- US Patent Application 15/475029; 20180285732
Automatic tuning of artificial neural networks
patent-application, December 2016
- Brothers, John W.; Lee, Joohoon
- US Patent Application 15/154650; 20160358070
System and method for identifying composition preferences
patent-application, April 2017
- Chee, Yi-Min; Jagmohan, Ashish; Luna, Pamela N.
- US Patent Application 15/007813; 20170116538