Hardware assisted fine-grained data movement
Abstract
A processor includes a task scheduling unit and a compute unit coupled to the task scheduling unit. The task scheduling unit performs a task dependency assessment of a task dependency graph and task data requirements that correspond to each task of the plurality of tasks. Based on the task dependency assessment, the task scheduling unit schedules a first task of the plurality of tasks and a second proxy object of a plurality of proxy objects specified by the task data requirements such that a memory transfer of the second proxy object of the plurality of proxy objects occurs while the first task is being executed.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 2222183
- Patent Number(s):
- 11734059
- Application Number:
- 16/824,601
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- DOE Contract Number:
- AC52-07NA27344; B620717
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 03/19/2020
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Hassaan, Muhammad Amber, Kaushik, Anirudh Mohan, Puthoor, Sooraj, Ravi, Gokul Subramanian, Beckmann, Bradford, and Aji, Ashwin. Hardware assisted fine-grained data movement. United States: N. p., 2023.
Web.
Hassaan, Muhammad Amber, Kaushik, Anirudh Mohan, Puthoor, Sooraj, Ravi, Gokul Subramanian, Beckmann, Bradford, & Aji, Ashwin. Hardware assisted fine-grained data movement. United States.
Hassaan, Muhammad Amber, Kaushik, Anirudh Mohan, Puthoor, Sooraj, Ravi, Gokul Subramanian, Beckmann, Bradford, and Aji, Ashwin. Tue .
"Hardware assisted fine-grained data movement". United States. https://www.osti.gov/servlets/purl/2222183.
@article{osti_2222183,
title = {Hardware assisted fine-grained data movement},
author = {Hassaan, Muhammad Amber and Kaushik, Anirudh Mohan and Puthoor, Sooraj and Ravi, Gokul Subramanian and Beckmann, Bradford and Aji, Ashwin},
abstractNote = {A processor includes a task scheduling unit and a compute unit coupled to the task scheduling unit. The task scheduling unit performs a task dependency assessment of a task dependency graph and task data requirements that correspond to each task of the plurality of tasks. Based on the task dependency assessment, the task scheduling unit schedules a first task of the plurality of tasks and a second proxy object of a plurality of proxy objects specified by the task data requirements such that a memory transfer of the second proxy object of the plurality of proxy objects occurs while the first task is being executed.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2023},
month = {8}
}
Works referenced in this record:
Optimizing the use of GPU memory in applications with large data sets
conference, December 2009
- Satish, Nadathur; Sundaram, Narayanan; Keutzer, Kurt
- 2009 International Conference on High Performance Computing (HiPC)
System, method, and computer program product for management of dependency between tasks
patent, March 2016
- Sevastiyanov, Igor; Fahs, Brian; Wang, Nicholas
- US Patent Document 9,286,119