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Title: Digital encoding algorithm for pixelated detectors

Abstract

A detector for imaging and efficiently digitizing a spatial distribution of photon flux includes pixel circuits that compressively encode pixel values generated by integrated analog to digital converters (ADCs). On-pixel digital compression circuits (DCCs) implement compression to increase continuous frame rate by reducing the number of bits per pixel while keeping quantization error below Poisson noise. Several mapping algorithms for photon-counting and charge-integrating detectors and compact digital logic implementations are presented.

Inventors:
; ;
Issue Date:
Research Org.:
Argonne National Laboratory (ANL), Argonne, IL (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
2222147
Patent Number(s):
11729345
Application Number:
16/887,706
Assignee:
UChicago Argonne, LLC (Chicago, IL)
Patent Classifications (CPCs):
G - PHYSICS G01 - MEASURING G01N - INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
G - PHYSICS G01 - MEASURING G01T - MEASUREMENT OF NUCLEAR OR X-RADIATION
DOE Contract Number:  
AC02-06CH11357
Resource Type:
Patent
Resource Relation:
Patent File Date: 05/29/2020
Country of Publication:
United States
Language:
English

Citation Formats

Hammer, Michael P., Miceli, Antonino, and Jacobsen, Chris J. Digital encoding algorithm for pixelated detectors. United States: N. p., 2023. Web.
Hammer, Michael P., Miceli, Antonino, & Jacobsen, Chris J. Digital encoding algorithm for pixelated detectors. United States.
Hammer, Michael P., Miceli, Antonino, and Jacobsen, Chris J. Tue . "Digital encoding algorithm for pixelated detectors". United States. https://www.osti.gov/servlets/purl/2222147.
@article{osti_2222147,
title = {Digital encoding algorithm for pixelated detectors},
author = {Hammer, Michael P. and Miceli, Antonino and Jacobsen, Chris J.},
abstractNote = {A detector for imaging and efficiently digitizing a spatial distribution of photon flux includes pixel circuits that compressively encode pixel values generated by integrated analog to digital converters (ADCs). On-pixel digital compression circuits (DCCs) implement compression to increase continuous frame rate by reducing the number of bits per pixel while keeping quantization error below Poisson noise. Several mapping algorithms for photon-counting and charge-integrating detectors and compact digital logic implementations are presented.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2023},
month = {8}
}

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