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Title: High voltage switch with cascaded transistor topology

Abstract

A switching apparatus includes three or more series-connected transistors, and it further includes a balancing network. The balancing network includes a resistor network configured to divide a voltage from a voltage source across the series-connected transistors. The resistor network includes at least two resistive legs connected in parallel. In each resistive leg, two or more resistors are connected in series. The balancing network may further comprise at least one capacitive leg of series-connected capacitors connected across the series-connected transistors, and it may further comprise at least one leg of series-connected avalanche diodes connected across the series-connected transistors for overvoltage protection. In example embodiments, the series-connected transistors are JFETs. In other example embodiments, the series-connected transistors may be HEMTs or GaN transistors.

Inventors:
; ; ;
Issue Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE National Nuclear Security Administration (NNSA)
OSTI Identifier:
2222143
Patent Number(s):
11728804
Application Number:
17/737,593
Assignee:
National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)
DOE Contract Number:  
NA0003525
Resource Type:
Patent
Resource Relation:
Patent File Date: 05/05/2022
Country of Publication:
United States
Language:
English

Citation Formats

Gill, Lee, Garcia Rodriguez, Luciano Andres, Mueller, Jacob, and Neely, Jason Christopher. High voltage switch with cascaded transistor topology. United States: N. p., 2023. Web.
Gill, Lee, Garcia Rodriguez, Luciano Andres, Mueller, Jacob, & Neely, Jason Christopher. High voltage switch with cascaded transistor topology. United States.
Gill, Lee, Garcia Rodriguez, Luciano Andres, Mueller, Jacob, and Neely, Jason Christopher. Tue . "High voltage switch with cascaded transistor topology". United States. https://www.osti.gov/servlets/purl/2222143.
@article{osti_2222143,
title = {High voltage switch with cascaded transistor topology},
author = {Gill, Lee and Garcia Rodriguez, Luciano Andres and Mueller, Jacob and Neely, Jason Christopher},
abstractNote = {A switching apparatus includes three or more series-connected transistors, and it further includes a balancing network. The balancing network includes a resistor network configured to divide a voltage from a voltage source across the series-connected transistors. The resistor network includes at least two resistive legs connected in parallel. In each resistive leg, two or more resistors are connected in series. The balancing network may further comprise at least one capacitive leg of series-connected capacitors connected across the series-connected transistors, and it may further comprise at least one leg of series-connected avalanche diodes connected across the series-connected transistors for overvoltage protection. In example embodiments, the series-connected transistors are JFETs. In other example embodiments, the series-connected transistors may be HEMTs or GaN transistors.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2023},
month = {8}
}

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