Title: Programmable delay device enabling large delay in small package

Abstract

A programmable delay device that provides delays of more than 100 ns over a broad bandwidth is disclosed. The device includes an input stage that employs M sampling switched capacitor elements such that each sampling switched capacitor element samples at a rate of only 1/M of the fundamental sampling rate. The device includes a programmable delay stage with M programmable switched capacitor banks, each programmable switched capacitor bank having N delay switched capacitor storage elements. Thus, the programmable delay stage includes a total of M×N delay switched capacitor storage elements, thereby reducing the sampling rate by a factor of M×N. This reduced sampling rate permits much smaller sampling switches, resulting in reduced leakage current and enabling far longer programmable delay times. Lastly, the device includes an output reconstruction stage that reconstructs a delayed version of the input RF signal by combining signals from the programmable delay stage.

Inventors:

Forbes, Travis; Moody, Jesse; Magstadt, Benjamin Thomas

Issue Date:

2023-06-20

Research Org.:

Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

Sponsoring Org.:

USDOE National Nuclear Security Administration (NNSA)

OSTI Identifier:

1998519

Patent Number(s):

11683023

Application Number:

17/972,741

Assignee:

National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)

DOE Contract Number:  

NA0003525

Resource Type:

Patent

Resource Relation:

Patent File Date: 10/25/2022

Country of Publication:

United States

Language:

English