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Title: Plasma-based method for delayering of circuits

Abstract

The present invention relates to methods of delayering a semiconductor integrated circuit die or wafer. In at least one aspect, the method includes exposing a die or wafer to plasma of an etching gas and detecting exposure of one or more metal layers within the die. In one aspect of the invention, the plasma of the etching gas is non-selective and removes all materials in a layer at about the same rate. In another aspect of the invention, two different plasmas of corresponding etching gases are employed with each plasma of the etching gas being selective, thus necessitating the sequential use of both plasmas of corresponding etching gases to remove all materials in a layer.

Inventors:
; ; ; ; ;
Issue Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE National Nuclear Security Administration (NNSA)
OSTI Identifier:
1998425
Patent Number(s):
11664238
Application Number:
16/941,676
Assignee:
National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)
DOE Contract Number:  
NA0003525
Resource Type:
Patent
Resource Relation:
Patent File Date: 07/29/2020
Country of Publication:
United States
Language:
English

Citation Formats

Shul, Randy J., Friedman, Caitlin Rochford, Salazar, Gregory Paul, Rye, Michael J., Sniegowski, Jeffry Joseph, and Greth, Karl Douglas. Plasma-based method for delayering of circuits. United States: N. p., 2023. Web.
Shul, Randy J., Friedman, Caitlin Rochford, Salazar, Gregory Paul, Rye, Michael J., Sniegowski, Jeffry Joseph, & Greth, Karl Douglas. Plasma-based method for delayering of circuits. United States.
Shul, Randy J., Friedman, Caitlin Rochford, Salazar, Gregory Paul, Rye, Michael J., Sniegowski, Jeffry Joseph, and Greth, Karl Douglas. Tue . "Plasma-based method for delayering of circuits". United States. https://www.osti.gov/servlets/purl/1998425.
@article{osti_1998425,
title = {Plasma-based method for delayering of circuits},
author = {Shul, Randy J. and Friedman, Caitlin Rochford and Salazar, Gregory Paul and Rye, Michael J. and Sniegowski, Jeffry Joseph and Greth, Karl Douglas},
abstractNote = {The present invention relates to methods of delayering a semiconductor integrated circuit die or wafer. In at least one aspect, the method includes exposing a die or wafer to plasma of an etching gas and detecting exposure of one or more metal layers within the die. In one aspect of the invention, the plasma of the etching gas is non-selective and removes all materials in a layer at about the same rate. In another aspect of the invention, two different plasmas of corresponding etching gases are employed with each plasma of the etching gas being selective, thus necessitating the sequential use of both plasmas of corresponding etching gases to remove all materials in a layer.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2023},
month = {5}
}

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