Hardware accelerated dynamic work creation on a graphics processing unit
Abstract
A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Santa Clara, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1987029
- Patent Number(s):
- 11550627
- Application Number:
- 17/215,171
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- DOE Contract Number:
- AC52-07NA27344; B620717
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 03/29/2021
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Gutierrez, Anthony T., and Puthoor, Sooraj. Hardware accelerated dynamic work creation on a graphics processing unit. United States: N. p., 2023.
Web.
Gutierrez, Anthony T., & Puthoor, Sooraj. Hardware accelerated dynamic work creation on a graphics processing unit. United States.
Gutierrez, Anthony T., and Puthoor, Sooraj. Tue .
"Hardware accelerated dynamic work creation on a graphics processing unit". United States. https://www.osti.gov/servlets/purl/1987029.
@article{osti_1987029,
title = {Hardware accelerated dynamic work creation on a graphics processing unit},
author = {Gutierrez, Anthony T. and Puthoor, Sooraj},
abstractNote = {A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2023},
month = {1}
}
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