Predicting failure parameters of semiconductor devices subjected to stress conditions
Abstract
A method for predicting failure parameters of semiconductor devices can include receiving a set of data that includes (i) characteristics of a sample semiconductor device, and (ii) parameters characterizing a stress condition. The method further includes extracting a plurality of feature values from the set of data and inputting the plurality of feature values into a trained model executing on the one or more processors, wherein the trained model is configured according to an artificial intelligence (AI) algorithm based on a previous plurality of feature values, and wherein the trained model is operable to output a failure prediction based on the plurality of feature values. Further, the method includes generating, via the trained model, a predicted failure parameter of the sample semiconductor device due to the stress condition.
- Inventors:
- Issue Date:
- Research Org.:
- Argonne National Laboratory (ANL), Argonne, IL (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1986795
- Patent Number(s):
- 11493548
- Application Number:
- 17/383,776
- Assignee:
- UChicago Argonne, LLC (Chicago, IL)
- DOE Contract Number:
- AC02-06CH11357
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 07/23/2021
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Ahmed, Moinuddin, Hryn, John N., and Stankus, Christopher. Predicting failure parameters of semiconductor devices subjected to stress conditions. United States: N. p., 2022.
Web.
Ahmed, Moinuddin, Hryn, John N., & Stankus, Christopher. Predicting failure parameters of semiconductor devices subjected to stress conditions. United States.
Ahmed, Moinuddin, Hryn, John N., and Stankus, Christopher. Tue .
"Predicting failure parameters of semiconductor devices subjected to stress conditions". United States. https://www.osti.gov/servlets/purl/1986795.
@article{osti_1986795,
title = {Predicting failure parameters of semiconductor devices subjected to stress conditions},
author = {Ahmed, Moinuddin and Hryn, John N. and Stankus, Christopher},
abstractNote = {A method for predicting failure parameters of semiconductor devices can include receiving a set of data that includes (i) characteristics of a sample semiconductor device, and (ii) parameters characterizing a stress condition. The method further includes extracting a plurality of feature values from the set of data and inputting the plurality of feature values into a trained model executing on the one or more processors, wherein the trained model is configured according to an artificial intelligence (AI) algorithm based on a previous plurality of feature values, and wherein the trained model is operable to output a failure prediction based on the plurality of feature values. Further, the method includes generating, via the trained model, a predicted failure parameter of the sample semiconductor device due to the stress condition.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2022},
month = {11}
}
Works referenced in this record:
System and Method for Compensating Measured IDDQ Values
patent-application, May 2014
- Narayen, Dushyant; Singh, Nerinder; Ponnuvel, Gunaseelan
- US Patent Application 13/667872; 20140125364
Terrestrial Neutron-Induced Failures in Silicon Carbide Power MOSFETs and Diodes
journal, June 2018
- Akturk, A.; McGarrity, J. M.; Goldsman, N.
- IEEE Transactions on Nuclear Science, Vol. 65, Issue 6
Scanning Laser And Optical Beam Induced Current Methods For Failure Analysis Of Electronic Devices (#)
conference, September 1989
- Grasso, Gaetano; Muschitiello, Michele; Stucchi, Michele
- SPIE Proceedings
Experimental Detection and Numerical Validation of Different Failure Mechanisms in IGBTs During Unclamped Inductive Switching
journal, February 2013
- Breglio, Giovanni; Irace, Andrea; Napoli, Ettore
- IEEE Transactions on Electron Devices, Vol. 60, Issue 2
Evidence of Hot-Electron Effects During Hard Switching of AlGaN/GaN HEMTs
journal, September 2017
- Rossetto, I.; Meneghini, M.; Tajalli, A.
- IEEE Transactions on Electron Devices, Vol. 64, Issue 9
Failure of Switching Operation of SiC-MOSFETs and Effects of Stacking Faults on Safe Operation Area
journal, October 2018
- Fujita, Ryusei; Tani, Kazuki; Konishi, Kumiko
- IEEE Transactions on Electron Devices, Vol. 65, Issue 10
Voltage Contrast Based Fault and Defect Inference in Logic Chips
patent-application, November 2016
- Duffy, Brian
- US Patent Application 15/136680; 20160341791
An ultrafast IR thermography system for transient temperature detection on electronic devices
conference, March 2014
- Romano, G.; Riccio, M.; De Falco, G.
- 2014 Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM)
Failure mechanisms of IGBTs under short-circuit and clamped inductive switching stress
journal, January 1999
- Trivedi, M.; Shenai, K.
- IEEE Transactions on Power Electronics, Vol. 14, Issue 1