Memory row recording for mitigating crosstalk in dynamic random access memory
Abstract
A method includes adding a set of one or more victim rows to a first probabilistic filter and to a second probabilistic filter, in response to a memory access request, identifying a candidate victim row adjacent to a memory address specified by a memory access request, identifying the candidate victim row as a victim row in the set of victim rows based on performing a lookup of the candidate victim row in a selected filter, where the selected filter includes one of the first probabilistic filter and the second probabilistic filter, in response to identifying the candidate row as the victim row, enabling a row hammering countermeasure, clearing the first probabilistic filter in each of a first set of time periods, and clearing the second probabilistic filter in each of a second set of time periods interleaved with the first set of time periods.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Santa Clara, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1986776
- Patent Number(s):
- 11488654
- Application Number:
- 16/902,204
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- DOE Contract Number:
- AC52-07NA27344; B620717
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 06/15/2020
- Country of Publication:
- United States
- Language:
- English
Citation Formats
SeyedzadehDelcheh, SeyedMohammad. Memory row recording for mitigating crosstalk in dynamic random access memory. United States: N. p., 2022.
Web.
SeyedzadehDelcheh, SeyedMohammad. Memory row recording for mitigating crosstalk in dynamic random access memory. United States.
SeyedzadehDelcheh, SeyedMohammad. Tue .
"Memory row recording for mitigating crosstalk in dynamic random access memory". United States. https://www.osti.gov/servlets/purl/1986776.
@article{osti_1986776,
title = {Memory row recording for mitigating crosstalk in dynamic random access memory},
author = {SeyedzadehDelcheh, SeyedMohammad},
abstractNote = {A method includes adding a set of one or more victim rows to a first probabilistic filter and to a second probabilistic filter, in response to a memory access request, identifying a candidate victim row adjacent to a memory address specified by a memory access request, identifying the candidate victim row as a victim row in the set of victim rows based on performing a lookup of the candidate victim row in a selected filter, where the selected filter includes one of the first probabilistic filter and the second probabilistic filter, in response to identifying the candidate row as the victim row, enabling a row hammering countermeasure, clearing the first probabilistic filter in each of a first set of time periods, and clearing the second probabilistic filter in each of a second set of time periods interleaved with the first set of time periods.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2022},
month = {11}
}
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Works referenced in this record:
Mitigating Wordline Crosstalk Using Adaptive Trees of Counters
conference, June 2018
- Seyedzadeh, Seyed Mohammad; Jones, Alex K.; Melhem, Rami
- 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA)
Raidr
journal, September 2012
- Liu, Jamie; Jaiyen, Ben; Veras, Richard
- ACM SIGARCH Computer Architecture News, Vol. 40, Issue 3
Callgraph signature prefetch
patent, May 2020
- Hakewill, James Robert Howard; Gupta, Nikhil
- US Patent Document 10,642,618
An ultra-low power CMOS random number generator
journal, February 2008
- Zhou, Sheng-hua; Zhang, Wancheng; Wu, Nan-Jian
- Solid-State Electronics, Vol. 52, Issue 2
Providing Dead-Block Prediction for Determining Whether to Cache Data in Cache Devices
patent-application, February 2019
- Alameldeen, Alaa R.; Chacon, Gino
- US Patent Application 15/996392; 20190050332
Architectural Support for Mitigating Row Hammering in DRAM Memories
journal, January 2015
- Kim, Dae-Hyun; Nair, Prashant J.; Qureshi, Moinuddin K.
- IEEE Computer Architecture Letters, Vol. 14, Issue 1
Apparatus and Methods for Triggering Row Hammer Address Sampling
patent-application, January 2020
- Ito, Yutaka; He, Yuan
- US Patent Application 16/025844; 20200005857
Anvil
journal, March 2016
- Aweke, Zelalem Birhanu; Yitbarek, Salessawi Ferede; Qiao, Rui
- ACM SIGPLAN Notices, Vol. 51, Issue 4
Cuckoo Filter
conference, December 2014
- Fan, Bin; Andersen, Dave G.; Kaminsky, Michael
- Proceedings of the 10th ACM International on Conference on emerging Networking Experiments and Technologies
Flipping bits in memory without accessing them: an experimental study of DRAM disturbance errors
journal, October 2014
- Kim, Yoongu; Daly, Ross; Kim, Jeremie
- ACM SIGARCH Computer Architecture News, Vol. 42, Issue 3
Memory Chip Having Reduced Baseline Refresh Rate with Additional Refreshing for Weak Cells
patent-application, March 2019
- Kang, Uksong; Halbert, John B.
- US Patent Application 15/714789; 20190096472
Balancing DRAM locality and parallelism in shared memory CMP systems
conference, February 2012
- Jeong, Min Kyu; Yoon, Doe Hyun; Sunwoo, Dam
- 2012 IEEE 18th International Symposium on High Performance Computer Architecture (HPCA), IEEE International Symposium on High-Performance Comp Architecture
Method and apparatus for mitigating row hammer attacks
patent, March 2021
- SeyedzadehDelcheh, SeyedMohammad; Raasch, Steven E.
- US Patent Document 10,950,292
ArchShield
journal, June 2013
- Nair, Prashant J.; Kim, Dae-Hyun; Qureshi, Moinuddin K.
- ACM SIGARCH Computer Architecture News, Vol. 41, Issue 3
DRAM adjacent row disturb mitigation
patent, November 2017
- Fisch, David Edward; Plants, William C.
- US Patent Document 9,812,185
System and Method for Self-Resizing Associative Probabilistic Hash-Based Data Structures
patent-application, May 2020
- Breslow, Alexander D.
- US Patent Application 16/692679; 20200167327
Space/time trade-offs in hash coding with allowable errors
journal, July 1970
- Bloom, Burton H.
- Communications of the ACM, Vol. 13, Issue 7, p. 422-426