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Title: Bias control for a memory device

Abstract

Methods, systems, and devices for bias control for a memory device are described. A memory system may store indication of whether data is coherent. In some examples, the indication may be stored as metadata, where a first value indicates that the data is not coherent and a second value or a third value indicate that the data is coherent. When a processing unit or other component of the memory system processes a command to access data, the memory system may operate according to a device bias mode when the indication is the first value, and according to a host bias mode when the indication is the second value or the third value.

Inventors:
; ; ; ;
Issue Date:
Research Org.:
Micron Technology, Inc., Boise, ID (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1925104
Patent Number(s):
11442858
Application Number:
17/198,084
Assignee:
Micron Technology, Inc. (Boise, ID)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
2168213
Resource Type:
Patent
Resource Relation:
Patent File Date: 03/10/2021
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Walker, Dean, Hornung, Bryan D., Brewer, Tony M., Patrick, David M., and Baronne, Christopher A. Bias control for a memory device. United States: N. p., 2022. Web.
Walker, Dean, Hornung, Bryan D., Brewer, Tony M., Patrick, David M., & Baronne, Christopher A. Bias control for a memory device. United States.
Walker, Dean, Hornung, Bryan D., Brewer, Tony M., Patrick, David M., and Baronne, Christopher A. Tue . "Bias control for a memory device". United States. https://www.osti.gov/servlets/purl/1925104.
@article{osti_1925104,
title = {Bias control for a memory device},
author = {Walker, Dean and Hornung, Bryan D. and Brewer, Tony M. and Patrick, David M. and Baronne, Christopher A.},
abstractNote = {Methods, systems, and devices for bias control for a memory device are described. A memory system may store indication of whether data is coherent. In some examples, the indication may be stored as metadata, where a first value indicates that the data is not coherent and a second value or a third value indicate that the data is coherent. When a processing unit or other component of the memory system processes a command to access data, the memory system may operate according to a device bias mode when the indication is the first value, and according to a host bias mode when the indication is the second value or the third value.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2022},
month = {9}
}

Works referenced in this record:

Techniques for Managing Access to Hardware Accelerator Memory
patent-application, January 2019


Cache Coherency for Host-Device Systems
patent-application, October 2021


Selectively Updating a Coherence State in Response to a Storage Update
patent-application, June 2020


Coherency Tracking Apparatus and Method for an Attached Compressor or Accelerator
patent-application, July 2021


Accelerator Fabric
patent-application, April 2019


Pattern Based Cache Coherency Architecture for Embedded Manycores
journal, January 2016


Apparatus and Method for Managing Data Bias in a Graphics Processing Architecture
patent-application, October 2018


Systems and Methods for Composable Coherent Devices
patent-application, December 2021