Title: Controlling prediction functional blocks used by a branch predictor in a processor

Abstract

An electronic device includes a processor, a branch predictor in the processor, and a predictor controller in the processor. The branch predictor includes multiple prediction functional blocks, each prediction functional block configured for generating predictions for control transfer instructions (CTIs) in program code based on respective prediction information, the branch predictor configured to select, from among predictions generated by the prediction functional blocks for each CTI, a selected prediction to be used for that CTI. The predictor controller keeps a record of prediction functional blocks from which the branch predictor previously selected predictions for CTIs. The predictor controller uses information from the record for controlling which prediction functional blocks are used by the branch predictor for generating predictions for CTIs.

Inventors:

Agrawal, Varun; Kalamatianos, John

Issue Date:

2022-09-13

Research Org.:

Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)

Sponsoring Org.:

USDOE

OSTI Identifier:

1925103

Patent Number(s):

11442727

Application Number:

16/895,825

Assignee:

Advanced Micro Devices, Inc. (Santa Clara, CA)

Patent Classifications (CPCs):

G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

G06F9/30032 - {Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE}
G06F9/30058 - {Conditional branch instructions}
G06F9/3806 - {using address prediction, e.g. return stack, branch history buffer}
G06F9/3848 - {using hybrid branch prediction, e.g. selection between prediction techniques}

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DOE Contract Number:  

AC52-07NA27344; B620717

Resource Type:

Patent

Resource Relation:

Patent File Date: 06/08/2020

Country of Publication:

United States

Language:

English

Subject:

97 MATHEMATICS AND COMPUTING