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Title: Medium voltage planar DC bus distributed capacitor array

Abstract

An inverter with a modular bus assembly is described. In various embodiments, the modular bus assembly includes a laminated motherboard and a plurality of capacitor daughtercards. The laminated motherboard can be configured to interface a plurality of phase-leg modules and a plurality of capacitor daughtercards through a plurality of terminals and connectors located on a bottom side or a top side of the laminated motherboard. The laminated motherboard includes a layer stack with a plurality of conductor layers. Each of the plurality of conductor layers is implemented with a net spacing from a neighboring plated through hole (PTH) based at least in part on differences in potential to be applied to each of the plurality of conductor layers as compared to a potential to be applied to the PTH. Embedded shield polygons can be implemented on the laminated motherboard to mitigate surface discharge at surface terminal (PTH/SMT) triple junctions.

Inventors:
; ; ;
Issue Date:
Research Org.:
Virginia Polytechnic Inst. and State Univ. (Virginia Tech), Blacksburg, VA (United States)
Sponsoring Org.:
USDOE Office of Energy Efficiency and Renewable Energy (EERE)
OSTI Identifier:
1892699
Patent Number(s):
11271492
Application Number:
16/939,914
Assignee:
Virginia Tech Intellectual Properties, Inc. (Blacksburg, VA)
Patent Classifications (CPCs):
H - ELECTRICITY H02 - GENERATION H02M - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS
H - ELECTRICITY H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR H05K - PRINTED CIRCUITS
DOE Contract Number:  
EE0006521
Resource Type:
Patent
Resource Relation:
Patent File Date: 07/27/2020
Country of Publication:
United States
Language:
English

Citation Formats

Ravi, Lakshmi, Stewart, Joshua, Dong, Dong, and Burgos, Rolando. Medium voltage planar DC bus distributed capacitor array. United States: N. p., 2022. Web.
Ravi, Lakshmi, Stewart, Joshua, Dong, Dong, & Burgos, Rolando. Medium voltage planar DC bus distributed capacitor array. United States.
Ravi, Lakshmi, Stewart, Joshua, Dong, Dong, and Burgos, Rolando. Tue . "Medium voltage planar DC bus distributed capacitor array". United States. https://www.osti.gov/servlets/purl/1892699.
@article{osti_1892699,
title = {Medium voltage planar DC bus distributed capacitor array},
author = {Ravi, Lakshmi and Stewart, Joshua and Dong, Dong and Burgos, Rolando},
abstractNote = {An inverter with a modular bus assembly is described. In various embodiments, the modular bus assembly includes a laminated motherboard and a plurality of capacitor daughtercards. The laminated motherboard can be configured to interface a plurality of phase-leg modules and a plurality of capacitor daughtercards through a plurality of terminals and connectors located on a bottom side or a top side of the laminated motherboard. The laminated motherboard includes a layer stack with a plurality of conductor layers. Each of the plurality of conductor layers is implemented with a net spacing from a neighboring plated through hole (PTH) based at least in part on differences in potential to be applied to each of the plurality of conductor layers as compared to a potential to be applied to the PTH. Embedded shield polygons can be implemented on the laminated motherboard to mitigate surface discharge at surface terminal (PTH/SMT) triple junctions.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2022},
month = {3}
}

Works referenced in this record:

Circuit board system having a mounted board and a plurality of mounting boards
patent, May 1999


Overview of high voltage sic power semiconductor devices: development and application
journal, September 2017


Medium-Voltage SiC-Based Converter Laminated Bus Insulation Design and Assessment
journal, September 2019


Design and Testing of 6 kV H-bridge Power Electronics Building Block Based on 10 kV SiC MOSFET Module
conference, May 2018


Power Electronics System
patent-application, September 2017


Analysis of dc-Link Voltage Switching Ripple in Three-Phase PWM Inverters
journal, February 2018


Design of a Multilayer PCB Bus for Medium Voltage DC Converters
conference, August 2019


Toward Partial Discharge Reduction by Corner Correction in Power Module Layouts
conference, June 2018


Busbar design for SiC-based H-bridge PEBB using 1.7 kV, 400 a SiC MOSFETs operating at 100 kHz
conference, September 2016


Low stray inductance bus bar design and construction for good EMC performance in power electronic circuits
journal, March 2002


Concentrated Capacitor Assembly
patent-application, December 2009


Packaging of power supply using modular electronic modules
patent-application, January 2013


Modularly Constructed Power Converter Arrangement
patent-application, May 2011


Partial discharge control in a power electronic module using high permittivity non-linear dielectrics
journal, August 2010


Device for forming a plurality of accumulators that are combined to from a group
patent, April 2002


Laminated bus bars for power system interconnects
conference, January 1998


Dielectric breakdown of polyimide films: Area, thickness and temperature dependence
journal, February 2010


Estimation and minimization of power loop inductance in 135 kW SiC traction inverter
conference, March 2018


Electrical systems having interleaved DC interconnects
patent, February 2019


System and Method for Rack Mountable Modular DC Power Unit
patent-application, July 2016


High Power Multilayer Module Having Low Inductance and Fast Switching for Paralleling Power Devices
patent-application, June 2019


DC link bus design for high frequency, high temperature converters
conference, March 2017


Capacitor substrate unit for opening/closing module
patent-application, December 2018


Power-Module Assembly
patent-application, October 2016


Simulation of the electric field strength in the vicinity of metallization edges on dielectric substrates
journal, February 2015


Design of low inductive busbar for fast switching SiC modules verified by 3D FEM calculations and laboratory measurements
conference, June 2016


Composite Capacitance and Use Thereof
patent-application, June 2012