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Title: Fractional delay filter for a digital signal processing system

Abstract

A processing element for implementation in a digital signal processing system is provided. The processing element is configured to receive a first data stream comprising a plurality of digital values where each value represents a sample of an analog signal. The processing element is further configured to receive a second data stream comprising a series of digital values where each value represents a sample of the analog signal. The processing element is configured to filter the first data stream via a first Farrow-structured fractional delay (FD) filter and output a filtered first data stream; filter the second data stream via a second Farrow-structured FD filter and output a filtered second data stream; and temporarily store values from the second data stream and output the stored values to the first Farrow-structured FD filter so that the stored values can be used to filter the first data stream.

Inventors:
;
Issue Date:
Research Org.:
Kansas City Plant (KCP), Kansas City, MO (United States)
Sponsoring Org.:
USDOE National Nuclear Security Administration (NNSA)
OSTI Identifier:
1840427
Patent Number(s):
11115004
Application Number:
16/985,884
Assignee:
Honeywell Federal Manufacturing & Technologies, LLC (Kansas City, MO)
Patent Classifications (CPCs):
H - ELECTRICITY H03 - BASIC ELECTRONIC CIRCUITRY H03H - IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04L - TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
DOE Contract Number:  
NA0002839
Resource Type:
Patent
Resource Relation:
Patent File Date: 08/05/2020
Country of Publication:
United States
Language:
English

Citation Formats

Stanley, Dennis L., and Chritton, Audrey L. Fractional delay filter for a digital signal processing system. United States: N. p., 2021. Web.
Stanley, Dennis L., & Chritton, Audrey L. Fractional delay filter for a digital signal processing system. United States.
Stanley, Dennis L., and Chritton, Audrey L. Tue . "Fractional delay filter for a digital signal processing system". United States. https://www.osti.gov/servlets/purl/1840427.
@article{osti_1840427,
title = {Fractional delay filter for a digital signal processing system},
author = {Stanley, Dennis L. and Chritton, Audrey L.},
abstractNote = {A processing element for implementation in a digital signal processing system is provided. The processing element is configured to receive a first data stream comprising a plurality of digital values where each value represents a sample of an analog signal. The processing element is further configured to receive a second data stream comprising a series of digital values where each value represents a sample of the analog signal. The processing element is configured to filter the first data stream via a first Farrow-structured fractional delay (FD) filter and output a filtered first data stream; filter the second data stream via a second Farrow-structured FD filter and output a filtered second data stream; and temporarily store values from the second data stream and output the stored values to the first Farrow-structured FD filter so that the stored values can be used to filter the first data stream.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2021},
month = {9}
}

Works referenced in this record:

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patent, April 2010


Finite-Impulse-Response (FIR) Filter Employing a Parallel Architecture
patent-application, October 2002


Method and circuit arrangement for processing received signal
patent, September 1998


Analog Ultrasound Beamformer
patent-application, May 2017


Fractional rate resampling filter on FPGA
patent, October 2012


Systems and Methods for Ultrasound Beamforming
patent-application, April 2016