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Title: Two-terminal electronic charge resistance switching device

Abstract

A two-terminal memory device and methods for its use are provided. In the device, a bottom electrode is electrically continuous with a first operating terminal, and a control gate electrode is electrically continuous with a second operating terminal. A stack of insulator layers comprising a hopping conduction layer and a tunnel layer is contactingly interposed between the bottom electrode and the control gate electrode. The tunnel layer is thinner than the hopping conduction layer, and it has a wider bandgap than the hopping conduction layer. The hopping conduction layer consists of a material that supports electron hopping transport.

Inventors:
;
Issue Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE National Nuclear Security Administration (NNSA)
OSTI Identifier:
1805639
Patent Number(s):
10950790
Application Number:
16/798,723
Assignee:
National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)
DOE Contract Number:  
NA0003525
Resource Type:
Patent
Resource Relation:
Patent File Date: 02/24/2020
Country of Publication:
United States
Language:
English

Citation Formats

Marinella, Matthew, and Agarwal, Sandeep. Two-terminal electronic charge resistance switching device. United States: N. p., 2021. Web.
Marinella, Matthew, & Agarwal, Sandeep. Two-terminal electronic charge resistance switching device. United States.
Marinella, Matthew, and Agarwal, Sandeep. Tue . "Two-terminal electronic charge resistance switching device". United States. https://www.osti.gov/servlets/purl/1805639.
@article{osti_1805639,
title = {Two-terminal electronic charge resistance switching device},
author = {Marinella, Matthew and Agarwal, Sandeep},
abstractNote = {A two-terminal memory device and methods for its use are provided. In the device, a bottom electrode is electrically continuous with a first operating terminal, and a control gate electrode is electrically continuous with a second operating terminal. A stack of insulator layers comprising a hopping conduction layer and a tunnel layer is contactingly interposed between the bottom electrode and the control gate electrode. The tunnel layer is thinner than the hopping conduction layer, and it has a wider bandgap than the hopping conduction layer. The hopping conduction layer consists of a material that supports electron hopping transport.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2021},
month = {3}
}

Works referenced in this record:

Sonos Ono Stack Scaling
patent-application, December 2013


Oxide-nitride-oxide stack having multiple oxynitride layers
patent, January 2021