Integrated circuit authentication from a die material measurement
Abstract
The various technologies presented herein relate to measuring a signal generated by a die-based test circuit incorporated into an IC and utilizing the measured signal to authenticate the IC. The signal can be based upon a sensor response generated by the test circuit fabricated into the die, wherein the sensor response is based upon a property of the die material. The signal can be compared with a reference value obtained from one or more test circuit(s) respectively located on one or more reference dies, wherein the reference dies are respectively cut from different wafers, and the location at which the reference dies were cut is known. If the measured signal matches the reference value, the die is deemed to be from the same cut location as the dies from which the reference value was obtained. If the measured signal does not match the reference value, the die is not authenticated.
- Inventors:
- Issue Date:
- Research Org.:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1805606
- Patent Number(s):
- 10942215
- Application Number:
- 16/545,943
- Assignee:
- National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)
- Patent Classifications (CPCs):
-
G - PHYSICS G01 - MEASURING G01R - MEASURING ELECTRIC VARIABLES
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- AC04-94AL85000
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 08/20/2019
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Zortman, William A., Helinski, Ryan, and Hamlet, Jason. Integrated circuit authentication from a die material measurement. United States: N. p., 2021.
Web.
Zortman, William A., Helinski, Ryan, & Hamlet, Jason. Integrated circuit authentication from a die material measurement. United States.
Zortman, William A., Helinski, Ryan, and Hamlet, Jason. Tue .
"Integrated circuit authentication from a die material measurement". United States. https://www.osti.gov/servlets/purl/1805606.
@article{osti_1805606,
title = {Integrated circuit authentication from a die material measurement},
author = {Zortman, William A. and Helinski, Ryan and Hamlet, Jason},
abstractNote = {The various technologies presented herein relate to measuring a signal generated by a die-based test circuit incorporated into an IC and utilizing the measured signal to authenticate the IC. The signal can be based upon a sensor response generated by the test circuit fabricated into the die, wherein the sensor response is based upon a property of the die material. The signal can be compared with a reference value obtained from one or more test circuit(s) respectively located on one or more reference dies, wherein the reference dies are respectively cut from different wafers, and the location at which the reference dies were cut is known. If the measured signal matches the reference value, the die is deemed to be from the same cut location as the dies from which the reference value was obtained. If the measured signal does not match the reference value, the die is not authenticated.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2021},
month = {3}
}
Works referenced in this record:
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patent-application, May 2015
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Method and System for Tracing Die at Unit Level
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Technique for evaluating a fabrication of a die and wafer
patent-application, April 2005
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Method, system, and apparatus for authenticating devices during assembly
patent-application, January 2005
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