DOE Patents title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: System and method for obfuscation of electronic circuits

Abstract

A computer-implemented method of generating randomized electrical interconnects for an electronic circuit comprises steps of receiving a netlist of nodes of electronic components to be connected, each connection between the nodes forming an electrical interconnect; determining a list of one or more path directions for each electrical interconnect; determining a plurality of path direction distances for each electrical interconnect; generating a plurality of segments for each electrical interconnect, each segment having one path direction and a length which are selected at random; calculating a sum of the lengths of all of the segments in each path direction each time a segment is generated for each electrical interconnect; removing one path direction from the list of path directions when a first condition is met; and stopping the generating a plurality of segments for each electrical interconnect when a second condition is met.

Inventors:
Issue Date:
Research Org.:
Kansas City Plant (KCP), Kansas City, MO (United States)
Sponsoring Org.:
USDOE National Nuclear Security Administration (NNSA)
OSTI Identifier:
1805586
Patent Number(s):
10936779
Application Number:
16/402,504
Assignee:
Honeywell Federal Manufacturing & Technologies, LLC (Kansas City, MO)
DOE Contract Number:  
NA0002839
Resource Type:
Patent
Resource Relation:
Patent File Date: 05/03/2019
Country of Publication:
United States
Language:
English

Citation Formats

Trujillo, Joshua. System and method for obfuscation of electronic circuits. United States: N. p., 2021. Web.
Trujillo, Joshua. System and method for obfuscation of electronic circuits. United States.
Trujillo, Joshua. Tue . "System and method for obfuscation of electronic circuits". United States. https://www.osti.gov/servlets/purl/1805586.
@article{osti_1805586,
title = {System and method for obfuscation of electronic circuits},
author = {Trujillo, Joshua},
abstractNote = {A computer-implemented method of generating randomized electrical interconnects for an electronic circuit comprises steps of receiving a netlist of nodes of electronic components to be connected, each connection between the nodes forming an electrical interconnect; determining a list of one or more path directions for each electrical interconnect; determining a plurality of path direction distances for each electrical interconnect; generating a plurality of segments for each electrical interconnect, each segment having one path direction and a length which are selected at random; calculating a sum of the lengths of all of the segments in each path direction each time a segment is generated for each electrical interconnect; removing one path direction from the list of path directions when a first condition is met; and stopping the generating a plurality of segments for each electrical interconnect when a second condition is met.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2021},
month = {3}
}

Works referenced in this record:

Three-dimensional electronic circuit with multiple conductor layers and method for manufacturing same
patent, August 2000


Method of making a three-dimensional integrated circuit
patent, October 1996


Obfuscation techniques for enhancing software security
patent, December 2003


Conformal 3D non-planar multi-layer circuitry
patent, February 2016


Method and apparatus for blocking fluid and fluid vapors
patent, December 2002


Packaging for multi-processor shared-memory system
patent, April 2003


System and method for real-time transactional data obfuscation
patent, March 2016