Arrays of high-aspect-ratio germanium nanostructures with nanoscale pitch and methods for the fabrication thereof
Abstract
Methods for fabricating thin, high-aspect-ratio Ge nanostructures from high-quality, single-crystalline Ge substrates are provided. Also provided are grating structures made using the methods. The methods utilize a thin layer of graphene between a surface of a Ge substrate, and an overlying resist layer. The graphene passivates the surface, preventing the formation of water-soluble native Ge oxides that can result in the lift-off of the resist during the development of the resist.
- Inventors:
- Issue Date:
- Research Org.:
- Wisconsin Alumni Research Foundation, Madison, WI (United States); Univ. of New Mexico, Albuquerque, NM (United States); Univ. of Wisconsin, Madison, WI (United States)
- Sponsoring Org.:
- USDOE Office of Science (SC), Basic Energy Sciences (BES)
- OSTI Identifier:
- 1805542
- Patent Number(s):
- 10930490
- Application Number:
- 16/727,201
- Assignee:
- Wisconsin Alumni Research Foundation (WARF) (Madison, WI); The Regents of the University of New Mexico (Albuquerque, NM)
- Patent Classifications (CPCs):
-
B - PERFORMING OPERATIONS B82 - NANOTECHNOLOGY B82Y - SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES
G - PHYSICS G02 - OPTICS G02B - OPTICAL ELEMENTS, SYSTEMS, OR APPARATUS
- DOE Contract Number:
- FG02-03ER46028
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 12/26/2019
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Lagally, Max G., Cavallo, Francesca, and Mangu, Vijay Saradhi. Arrays of high-aspect-ratio germanium nanostructures with nanoscale pitch and methods for the fabrication thereof. United States: N. p., 2021.
Web.
Lagally, Max G., Cavallo, Francesca, & Mangu, Vijay Saradhi. Arrays of high-aspect-ratio germanium nanostructures with nanoscale pitch and methods for the fabrication thereof. United States.
Lagally, Max G., Cavallo, Francesca, and Mangu, Vijay Saradhi. Tue .
"Arrays of high-aspect-ratio germanium nanostructures with nanoscale pitch and methods for the fabrication thereof". United States. https://www.osti.gov/servlets/purl/1805542.
@article{osti_1805542,
title = {Arrays of high-aspect-ratio germanium nanostructures with nanoscale pitch and methods for the fabrication thereof},
author = {Lagally, Max G. and Cavallo, Francesca and Mangu, Vijay Saradhi},
abstractNote = {Methods for fabricating thin, high-aspect-ratio Ge nanostructures from high-quality, single-crystalline Ge substrates are provided. Also provided are grating structures made using the methods. The methods utilize a thin layer of graphene between a surface of a Ge substrate, and an overlying resist layer. The graphene passivates the surface, preventing the formation of water-soluble native Ge oxides that can result in the lift-off of the resist during the development of the resist.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2021},
month = {2}
}
Works referenced in this record:
Selective Epitaxy Using Epitaxy-Prevention Layers
patent-application, September 2016
- Cheng, Cheng-Wei; Kim, Jeehwan; Ott, John A.
- US Patent Application 14/645894; 20160268128
Atomic Layer Chemical Patterns for Block Polymer Assembly
patent-application, March 2017
- Mealey, Paul Franklin; Chang, Tzu-Hsuan; Xiong, Shisheng
- US Patent Application 15/215016; 20170062229
Process for Growing Nanowires or Nanopyramids on Graphic Substrates
patent-application, August 2013
- Kim, Dong-Chul; Hoiaas, Ida Marie; Munshi, Mazid
- US Patent Application 15/749228; 20180226242
Threshold Voltage Modulation Through Channel Length Adjustment
patent-application, March 2013
- Bao, Raqiang; Guo, Dechao; Liu, Derrick
- US Patent Application 15/273224; 20180083013
Method of forming hybrid nanostructure on graphene, hybrid nanostructure, and device including the hybrid nanostructure
patent, June 2020
- Kim, Sang-Woo; Park, Hyun Kyu
- US Patent Document 10,680,176
FinFET semiconductor device with germanium (GE) fins
patent, February 2014
- Xu, Jeff J.
- US Patent Document 8,648,400
Finfet Device and a Method for Fabricating the Same
patent-application, October 2020
- Huang, Wang-Chun; Yang, Kai-Chieh; Tsai, Ching-Wei
- US Patent Application 16/395494; 20200343273
III-V compound semiconductor material passivation with crystalline interlayer
patent, September 2013
- Shiu, Kuen-Ting; Guo, Dechao; Han, Shu-Jen
- US Patent Document 8,524,614
Defect reduction using aspect ratio trapping
patent, May 2012
- Bai, Jie; Park, Ji-Soo; Lochtefeld, Anthony J.
- US Patent Document 8,173,551
Methods and Materials for Lithography of a High Resolution HSQ Resist
patent-application, May 2014
- Hobbs, Richard; Petkov, Nikolay; Holmes, Justin
- US Patent Application 14/113175; 20140134524
Method of Forming Topcoat for Patterning
patent-application, May 2013
- Kim, Do Han; Suh, Hyo Seon; Moni, Priya
- US Patent Application 15/685609; 20180122648