Doped gate dielectric materials
Abstract
A field effect transistor having at least a gate, source, and drain electrodes and a semiconductor channel for controlling transport of charge carriers between the source and drain electrodes, the gate being insulated from the channel by an dielectric, at least a portion of the dielectric disposed between the gate electrode and the semiconductor channel being doped or imbued with the an element which if doped or imbued into a semiconductor material would cause the semiconductor to be p-type. The p-type element used to dope or imbue the gate dielectric is preferably Mg.
- Inventors:
- Issue Date:
- Research Org.:
- HRL Labs., LLC, Malibu, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1805435
- Patent Number(s):
- 10903333
- Application Number:
- 15/663,584
- Assignee:
- HRL Laboratories, LLC (Malibu, CA)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- AR000450
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 07/28/2017
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Cao, Yu, Chu, Rongming, and Li, Zijian Ray. Doped gate dielectric materials. United States: N. p., 2021.
Web.
Cao, Yu, Chu, Rongming, & Li, Zijian Ray. Doped gate dielectric materials. United States.
Cao, Yu, Chu, Rongming, and Li, Zijian Ray. Tue .
"Doped gate dielectric materials". United States. https://www.osti.gov/servlets/purl/1805435.
@article{osti_1805435,
title = {Doped gate dielectric materials},
author = {Cao, Yu and Chu, Rongming and Li, Zijian Ray},
abstractNote = {A field effect transistor having at least a gate, source, and drain electrodes and a semiconductor channel for controlling transport of charge carriers between the source and drain electrodes, the gate being insulated from the channel by an dielectric, at least a portion of the dielectric disposed between the gate electrode and the semiconductor channel being doped or imbued with the an element which if doped or imbued into a semiconductor material would cause the semiconductor to be p-type. The p-type element used to dope or imbue the gate dielectric is preferably Mg.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jan 26 00:00:00 EST 2021},
month = {Tue Jan 26 00:00:00 EST 2021}
}
Works referenced in this record:
Metal Oxide Semiconductor Thin Film Transistors
patent-application, January 2012
- Herman, Gregory; Maa, Jer-shen; Puntambekar, Kanan
- US Patent Application 12/836217; 20120012835
Method for Manufacturing Nitride Semiconductor Element
patent-application, November 2013
- Saitoh, Yu; Okada, Masaya; Ueno, Masaki
- US Patent Application 13/981856; 20130316507
Semiconductor Device, Inverter Circuit, and Vehicle
patent-application, September 2016
- Shimizu, Tatsuo; Iljima, Ryosuke
- US Patent Application 15/055848; 20160284804
Back Diffusion Suppression Structures
patent-application, October 2010
- Lidow, Alexander; Beach, Robert; Zhao, Guang Y.
- US Patent Application 12/756088; 20100258841
Germanium-Based Quantum Well Devices
patent-application, March 2016
- Pillarisetty, Ravi; Jin, Been-Yin; Chu-Kung, Benjamin
- US Patent Application 14/924643; 20160064520
III-Nitride Metal Insulator Semiconductor Field effect Transistor
patent-application, January 2013
- Chu, Rongming; Brown, David F.; Chen, Xu
- US Patent Application 13/456039; 20130026495
Semiconductor Device and Method of Manufacturing the Same
patent-application, September 2016
- Shimizu, Tatsuo
- US Patent Application 15/048239; 20160284830
III-nitride metal insulator semiconductor field effect transistor
patent, October 2014
- Chu, Rongming; Brown, David F.; Chen, Xu
- US Patent Document 8,853,709
Current aperture vertical electron transistors with ammonia molecular beam epitaxy grown p-type Gallium Nitride as a current blocking layer
patent-application, December 2012
- Chowdhury, Srabanti; Yeluri, Ramya; Hurni, Christophe
- US Patent Application 13/527885; 20120319127
Methods and Apparatus for Measuring Analytes Using Large Scale FET Arrays
patent-application, June 2016
- Fife, Keith G.
- US Patent Application 14/971435; 20160178570
Method and system for heating semiconductor wafers
patent, November 2000
- Gardner, Mark I.; Gilmer, Mark C.
- US Patent Document 6,152,075
Current aperture vertical electron transistors with ammonia molecular beam epitaxy grown p-type Gallium Nitride as a current blocking layer
patent-application, May 2015
- Chowdhury, Srabanti; Yeluri, Ramya; Hurni, Christophe
- US Patent Application 14/566443; 20150137137
Field Effect Transistor and Method of Manufacturing the Same
patent-application, January 2011
- Ota, Kazuki; Okamoto, Yasuhiro
- US Patent Application 12/919467; 20110006345