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Title: Performance CMOS voltage level-up shifter circuit topology using pre-drive pull-up transistors

Abstract

In a first example a voltage level-shifting device includes a level-shifting stage circuit. The level-shifting stage circuit includes a first level-shifting inverter circuit to invert a buffered input signal to drive a first internal node, a second level-shifting inverter circuit to invert a buffered inverted input signal to drive a second internal node, a first pre-drive circuit that receives the buffered inverted input signal, and drives the second internal node based on the state of the buffered inverted input signal, and a second pre-drive circuit that receives the buffered input signal, and drives the first internal node based on the state of the buffered input signal.

Inventors:
Issue Date:
Research Org.:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1771623
Patent Number(s):
10833678
Application Number:
16/525,913
Assignee:
Hewlett-Packard Development Company, L.P. (Houston, TX)
Patent Classifications (CPCs):
H - ELECTRICITY H03 - BASIC ELECTRONIC CIRCUITRY H03K - PULSE TECHNIQUE
DOE Contract Number:  
AC52-07NA27344
Resource Type:
Patent
Resource Relation:
Patent File Date: 07/30/2019
Country of Publication:
United States
Language:
English

Citation Formats

Armstrong, Paul R. Performance CMOS voltage level-up shifter circuit topology using pre-drive pull-up transistors. United States: N. p., 2020. Web.
Armstrong, Paul R. Performance CMOS voltage level-up shifter circuit topology using pre-drive pull-up transistors. United States.
Armstrong, Paul R. Tue . "Performance CMOS voltage level-up shifter circuit topology using pre-drive pull-up transistors". United States. https://www.osti.gov/servlets/purl/1771623.
@article{osti_1771623,
title = {Performance CMOS voltage level-up shifter circuit topology using pre-drive pull-up transistors},
author = {Armstrong, Paul R.},
abstractNote = {In a first example a voltage level-shifting device includes a level-shifting stage circuit. The level-shifting stage circuit includes a first level-shifting inverter circuit to invert a buffered input signal to drive a first internal node, a second level-shifting inverter circuit to invert a buffered inverted input signal to drive a second internal node, a first pre-drive circuit that receives the buffered inverted input signal, and drives the second internal node based on the state of the buffered inverted input signal, and a second pre-drive circuit that receives the buffered input signal, and drives the first internal node based on the state of the buffered input signal.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {11}
}

Works referenced in this record:

Level shift circuit
patent, August 1977


Techniques for adjusting level shifted signals
patent, February 2011