Sequence optimizations in a high-performance computing environment
Abstract
Embodiments are directed to techniques to determine dataflow graph instructions comprising one or more pick/switch instruction pairs and generate a reverse static single assignment graph based on the dataflow graph instructions, the reverse static single assignment graph comprising strongly connected components, each of the strongly connected components associated with at least one of the one or more pick/switch instruction pairs. Embodiments also include traversing the reverse static single assignment graph depth-first, and replace pick/switch instructions associated with strongly connected components having configuration values with compound instructions.
- Inventors:
- Issue Date:
- Research Org.:
- Intel Corp., Santa Clara, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1735264
- Patent Number(s):
- 10776087
- Application Number:
- 16/017,000
- Assignee:
- Intel Corporation (Santa Clara, CA)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- H98230-13-D-0124
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 06/25/2018
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Zhang, Yongzhi. Sequence optimizations in a high-performance computing environment. United States: N. p., 2020.
Web.
Zhang, Yongzhi. Sequence optimizations in a high-performance computing environment. United States.
Zhang, Yongzhi. Tue .
"Sequence optimizations in a high-performance computing environment". United States. https://www.osti.gov/servlets/purl/1735264.
@article{osti_1735264,
title = {Sequence optimizations in a high-performance computing environment},
author = {Zhang, Yongzhi},
abstractNote = {Embodiments are directed to techniques to determine dataflow graph instructions comprising one or more pick/switch instruction pairs and generate a reverse static single assignment graph based on the dataflow graph instructions, the reverse static single assignment graph comprising strongly connected components, each of the strongly connected components associated with at least one of the one or more pick/switch instruction pairs. Embodiments also include traversing the reverse static single assignment graph depth-first, and replace pick/switch instructions associated with strongly connected components having configuration values with compound instructions.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {9}
}
Works referenced in this record:
Compiler optimization
patent, April 2010
- Kawahito, Motohiro; Komatsu, Hideaki
- US Patent Document 7,707,568
Apparatus, Methods, and Systems for Operations in a Configurable Spatial Accelerator
patent-application, February 2019
- Fleming, JR., Kermin E.; Steely, JR., Simon C.; Glossop, Kent D.
- US Patent Application 16/024854; 20190042513
Parallelization Of Dataflow Actors With Local State
patent-application, February 2014
- Von Platen, Carl; Xu, Charles Chen; Yuan, Song
- US Patent Application 13/586820; 20140053129
Localized, Incremental Single Static Assignment Update
patent-application, January 2008
- Guo, Liang; Dutta, Swaroop V.; Trick, Andrew R.
- US Patent Application 11/494142; 20080028380
System and method for solving monotone information propagation problems
patent, July 1994
- Choi, Jong-Deok; Cytron, Ron K.; Ferrante, Jeanne
- US Patent Document 5,327,561
Systems and methods to read, optimize, and verify byte codes for a multiplatform jit
patent, May 2008
- Radigan, Jim J.
- US Patent Document 7,370,321
Vectorizing Combinations Of Program Operations
patent-application, October 2012
- Yi, Haoran; Duggan, Brady C.; Dye, Robert E.
- US Patent Application 13/076245; 20120254845
Method, System, And Computer Program Product For Ranking Of Documents Using Link Analysis, With Remedies For Sinks
patent-application, March 2006
- Canright, Geoffrey; Engo-Mosen, Kenth; Burgess, Mark
- US Patent Application 10/918713; 20060059119
Efficient Pipelining Of Synthesized Synchronous Circuits
patent-application, August 2004
- Snider, Gregory S.
- US Patent Application 10/775945; 20040163053
Methods and Apparatus to Map Single Static Assignment Instructions onto a Data Flow Graph in a Data Flow Architecture
patent-application, April 2019
- Zhang, Yongshi; Glossop, Kent D.
- US Patent Application 15/721454; 20190102151
Processors, Methods, and Systems for a Configurable Spatial Accelerator with Memory System Performance, Power Reduction, and Atomics Support Features
patent-application, January 2019
- Adler, Michael C.; Chow, Chiachen; Crago, Neal C.
- US Patent Application 15/640534; 20190004955
Methods and apparatus for compiling instructions for a data processor
patent, October 2007
- Fuhler, Richard A.; Pennello, Thomas J.; Jalkut, Michael Lee
- US Patent Document 7,278,137
Compiler Optimization
patent-application, December 2005
- Kawahito, Motohiro; Komatsu, Hideaki
- US Patent Application 11/133897; 20050268293
Processors and Methods for Pipelined Runtime Services in a Spatial Array
patent-application, January 2019
- Fleming, Kermin; Steely, Simon C.; Glossop, Kent D.
- US Patent Application 15/640538; 20190004994
Data Processing System Having Integrated Pipelined Array Data Processor
patent-application, April 2015
- Vorbach, Martin; Becker, Jurgen; Weinhardt, Markus
- US Patent Application 14/572643; 20150106596
Logic Circuit Generation Device and Method
patent-application, October 2016
- Isshiki, Tsuyoshi
- US Patent Application 15/103793; 20160299998
Apparatus, Methods, and Systems for Conditional Queues in a Configurable Spatial Accelerator
patent-application, October 2019
- Fleming, JR., Kermin E.; Zou, Ping; Diamond, Mitchell
- US Patent Application 15/944761; 20190303168
Processors and Methods for Privileged Configuration in a Spatial Array
patent-application, April 2019
- Fleming, Kermin E.; Steely, Simon C.; Glossop, Kent D.
- US Patent Application 15/721809; 20190102179
Compiling for multiple virtual machines targeting different processor architectures
patent, May 2004
- Radigan, James J.
- US Patent Document 6,738,967
Cost-sensitive SSA-based strength reduction algorithm for a machine with predication support and segmented addresses
patent, September 2001
- Santhanam, Vatsa
- US Patent Document 6,286,135
Method and Apparatus for Optimising Computer Program Code
patent-application, March 2016
- Oprea, Mihai Daniel; Arbone, Ciprian; Ditu, Bogdan Florin
- US Patent Application 14/531024; 20160062751