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Title: Sequence optimizations in a high-performance computing environment

Abstract

Embodiments are directed to techniques to determine dataflow graph instructions comprising one or more pick/switch instruction pairs and generate a reverse static single assignment graph based on the dataflow graph instructions, the reverse static single assignment graph comprising strongly connected components, each of the strongly connected components associated with at least one of the one or more pick/switch instruction pairs. Embodiments also include traversing the reverse static single assignment graph depth-first, and replace pick/switch instructions associated with strongly connected components having configuration values with compound instructions.

Inventors:
Issue Date:
Research Org.:
Intel Corp., Santa Clara, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1735264
Patent Number(s):
10776087
Application Number:
16/017,000
Assignee:
Intel Corporation (Santa Clara, CA)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
H98230-13-D-0124
Resource Type:
Patent
Resource Relation:
Patent File Date: 06/25/2018
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Zhang, Yongzhi. Sequence optimizations in a high-performance computing environment. United States: N. p., 2020. Web.
Zhang, Yongzhi. Sequence optimizations in a high-performance computing environment. United States.
Zhang, Yongzhi. Tue . "Sequence optimizations in a high-performance computing environment". United States. https://www.osti.gov/servlets/purl/1735264.
@article{osti_1735264,
title = {Sequence optimizations in a high-performance computing environment},
author = {Zhang, Yongzhi},
abstractNote = {Embodiments are directed to techniques to determine dataflow graph instructions comprising one or more pick/switch instruction pairs and generate a reverse static single assignment graph based on the dataflow graph instructions, the reverse static single assignment graph comprising strongly connected components, each of the strongly connected components associated with at least one of the one or more pick/switch instruction pairs. Embodiments also include traversing the reverse static single assignment graph depth-first, and replace pick/switch instructions associated with strongly connected components having configuration values with compound instructions.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {9}
}

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