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Title: Method and apparatus for temperature-gradient aware data-placement for 3D stacked DRAMs

Abstract

A system including a stack of two or more layers of volatile memory, such as layers of a 3D stacked DRAM memory, places data in the stack based on a temperature or a refresh rate. When a threshold is exceeded, data are moved from a first region to a second region in the stack, the second region having one or both of a second temperature lower than a first temperature of the first region or a second refresh rate lower than a first refresh rate of the first region.

Inventors:
; ;
Issue Date:
Research Org.:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1735083
Patent Number(s):
10725670
Application Number:
16/052,055
Assignee:
Advanced Micro Devices, Inc. (Santa Clara, CA)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G - PHYSICS G11 - INFORMATION STORAGE G11C - STATIC STORES
DOE Contract Number:  
AC52-07NA27344
Resource Type:
Patent
Resource Relation:
Patent File Date: 08/01/2018
Country of Publication:
United States
Language:
English

Citation Formats

Kotra, Jagadish B., Rao, Karthik, and Greathouse, Joseph L. Method and apparatus for temperature-gradient aware data-placement for 3D stacked DRAMs. United States: N. p., 2020. Web.
Kotra, Jagadish B., Rao, Karthik, & Greathouse, Joseph L. Method and apparatus for temperature-gradient aware data-placement for 3D stacked DRAMs. United States.
Kotra, Jagadish B., Rao, Karthik, and Greathouse, Joseph L. Tue . "Method and apparatus for temperature-gradient aware data-placement for 3D stacked DRAMs". United States. https://www.osti.gov/servlets/purl/1735083.
@article{osti_1735083,
title = {Method and apparatus for temperature-gradient aware data-placement for 3D stacked DRAMs},
author = {Kotra, Jagadish B. and Rao, Karthik and Greathouse, Joseph L.},
abstractNote = {A system including a stack of two or more layers of volatile memory, such as layers of a 3D stacked DRAM memory, places data in the stack based on a temperature or a refresh rate. When a threshold is exceeded, data are moved from a first region to a second region in the stack, the second region having one or both of a second temperature lower than a first temperature of the first region or a second refresh rate lower than a first refresh rate of the first region.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {7}
}

Works referenced in this record:

AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems
conference, June 2015

  • Qureshi, Moinuddin K.; Kim, Dae-Hyun; Khan, Samira
  • 2015 45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)
  • https://doi.org/10.1109/DSN.2015.58