Integrated circuits with programmable gate timing signal generation for power converters and apparatus comprising the same
Abstract
An apparatus is disclosed that includes a semiconductor device to control a power converter having two or more power FETs. The semiconductor device includes a gate signal generator configured to produce two or more gate signals able to drive the two or more FETs. The gate signal generator has programmable timing configuration parameters to control operation of the two or more gate signals, wherein the timing configuration parameters are digitally programmed via a memory in the semiconductor device. The memory may be implemented with fuses, other non-volatile memory or volatile memory. The parameters may be fixed or updated during a lifetime of the apparatus. A serial-to-parallel conversion may be used to input the parameters. Optimization methods may be performed to determine parameters considered to be optimal. The apparatus may also include the power converter.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- Sponsoring Org.:
- USDOE National Nuclear Security Administration (NNSA)
- OSTI Identifier:
- 1735016
- Patent Number(s):
- 10707755
- Application Number:
- 16/257,861
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H02 - GENERATION H02M - APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS
H - ELECTRICITY H03 - BASIC ELECTRONIC CIRCUITRY H03K - PULSE TECHNIQUE
- DOE Contract Number:
- AC52-07NA27344; B621073
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 01/25/2019
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING
Citation Formats
Zhang, Xin, Takken, Todd Edward, Wu, Chung-shiang, Senger, Robert Matthew, Haring, Rudolf Adriaan, and Ohmacht, Martin. Integrated circuits with programmable gate timing signal generation for power converters and apparatus comprising the same. United States: N. p., 2020.
Web.
Zhang, Xin, Takken, Todd Edward, Wu, Chung-shiang, Senger, Robert Matthew, Haring, Rudolf Adriaan, & Ohmacht, Martin. Integrated circuits with programmable gate timing signal generation for power converters and apparatus comprising the same. United States.
Zhang, Xin, Takken, Todd Edward, Wu, Chung-shiang, Senger, Robert Matthew, Haring, Rudolf Adriaan, and Ohmacht, Martin. Tue .
"Integrated circuits with programmable gate timing signal generation for power converters and apparatus comprising the same". United States. https://www.osti.gov/servlets/purl/1735016.
@article{osti_1735016,
title = {Integrated circuits with programmable gate timing signal generation for power converters and apparatus comprising the same},
author = {Zhang, Xin and Takken, Todd Edward and Wu, Chung-shiang and Senger, Robert Matthew and Haring, Rudolf Adriaan and Ohmacht, Martin},
abstractNote = {An apparatus is disclosed that includes a semiconductor device to control a power converter having two or more power FETs. The semiconductor device includes a gate signal generator configured to produce two or more gate signals able to drive the two or more FETs. The gate signal generator has programmable timing configuration parameters to control operation of the two or more gate signals, wherein the timing configuration parameters are digitally programmed via a memory in the semiconductor device. The memory may be implemented with fuses, other non-volatile memory or volatile memory. The parameters may be fixed or updated during a lifetime of the apparatus. A serial-to-parallel conversion may be used to input the parameters. Optimization methods may be performed to determine parameters considered to be optimal. The apparatus may also include the power converter.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {7}
}
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