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Title: Supporting adaptive shared cache management

Abstract

Embodiment of this disclosure provides a mechanism to use a portion of an inactive processing element's private cache as an extended last-level cache storage space to adaptively adjust the size of shared cache. In one embodiment, a processing device is provided. The processing device comprising a cache controller is to identify a cache line to evict from a shared cache. An inactive processing core is selected by the cache controller from a plurality of processing cores associated with the shared cache. Then, a private cache of the inactive processing core is notified of an identifier of a cache line associated with the shared cache. Thereupon, the cache line is evicted from the shared cache to install in the private cache.

Inventors:
; ; ; ;
Issue Date:
Research Org.:
Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1735008
Patent Number(s):
10705962
Application Number:
15/850,865
Assignee:
Intel Corporation (Santa Clara, CA)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE Y02D - CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWN ENERGY USE
DOE Contract Number:  
AC02-05CH11231
Resource Type:
Patent
Resource Relation:
Patent File Date: 12/21/2017
Country of Publication:
United States
Language:
English

Citation Formats

Beckmann, Carl J., Blankenship, Robert G., Miao, Chyi-Chang, Natarajan, Chitra, and Nguyen, Anthony-Trung D. Supporting adaptive shared cache management. United States: N. p., 2020. Web.
Beckmann, Carl J., Blankenship, Robert G., Miao, Chyi-Chang, Natarajan, Chitra, & Nguyen, Anthony-Trung D. Supporting adaptive shared cache management. United States.
Beckmann, Carl J., Blankenship, Robert G., Miao, Chyi-Chang, Natarajan, Chitra, and Nguyen, Anthony-Trung D. Tue . "Supporting adaptive shared cache management". United States. https://www.osti.gov/servlets/purl/1735008.
@article{osti_1735008,
title = {Supporting adaptive shared cache management},
author = {Beckmann, Carl J. and Blankenship, Robert G. and Miao, Chyi-Chang and Natarajan, Chitra and Nguyen, Anthony-Trung D.},
abstractNote = {Embodiment of this disclosure provides a mechanism to use a portion of an inactive processing element's private cache as an extended last-level cache storage space to adaptively adjust the size of shared cache. In one embodiment, a processing device is provided. The processing device comprising a cache controller is to identify a cache line to evict from a shared cache. An inactive processing core is selected by the cache controller from a plurality of processing cores associated with the shared cache. Then, a private cache of the inactive processing core is notified of an identifier of a cache line associated with the shared cache. Thereupon, the cache line is evicted from the shared cache to install in the private cache.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {7}
}